^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * ALPHAPROJECT AP-SH4AD-0A Support.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2010 ALPHAPROJECT Co.,Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2010 Matt Fleming
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (C) 2010 Paul Mundt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/regulator/fixed.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/regulator/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/smsc911x.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <asm/machvec.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/sizes.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) /* Dummy supplies, where voltage doesn't matter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) static struct regulator_consumer_supply dummy_supplies[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) REGULATOR_SUPPLY("vddvario", "smsc911x"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) REGULATOR_SUPPLY("vdd33a", "smsc911x"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) static struct resource smsc911x_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) .name = "smsc911x-memory",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) .start = 0xA4000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) .end = 0xA4000000 + SZ_256 - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) .name = "smsc911x-irq",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) .start = evt2irq(0x200),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) .end = evt2irq(0x200),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) static struct smsc911x_platform_config smsc911x_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) .flags = SMSC911X_USE_16BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) .phy_interface = PHY_INTERFACE_MODE_MII,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) static struct platform_device smsc911x_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) .name = "smsc911x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) .num_resources = ARRAY_SIZE(smsc911x_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) .resource = smsc911x_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) .platform_data = &smsc911x_config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) static struct platform_device *apsh4ad0a_devices[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) &smsc911x_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) static int __init apsh4ad0a_devices_setup(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) return platform_add_devices(apsh4ad0a_devices,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) ARRAY_SIZE(apsh4ad0a_devices));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) device_initcall(apsh4ad0a_devices_setup);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) static int apsh4ad0a_mode_pins(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) int value = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) /* These are the factory default settings of SW1 and SW2.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) * If you change these dip switches then you will need to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) * adjust the values below as well.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) value |= MODE_PIN0; /* Clock Mode 3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) value |= MODE_PIN1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) value &= ~MODE_PIN2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) value &= ~MODE_PIN3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) value &= ~MODE_PIN4; /* 16-bit Area0 bus width */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) value |= MODE_PIN5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) value |= MODE_PIN6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) value |= MODE_PIN7; /* Normal mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) value |= MODE_PIN8; /* Little Endian */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) value |= MODE_PIN9; /* Crystal resonator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) value &= ~MODE_PIN10; /* 29-bit address mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) value &= ~MODE_PIN11; /* PCI-E Root port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) value &= ~MODE_PIN12; /* 4 lane + 1 lane */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) value |= MODE_PIN13; /* AUD Enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) value &= ~MODE_PIN14; /* Normal Operation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) return value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) static int apsh4ad0a_clk_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) struct clk *clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) clk = clk_get(NULL, "extal");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) if (IS_ERR(clk))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) return PTR_ERR(clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) ret = clk_set_rate(clk, 33333000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) clk_put(clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) /* Initialize the board */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) static void __init apsh4ad0a_setup(char **cmdline_p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) pr_info("Alpha Project AP-SH4AD-0A support:\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) static void __init apsh4ad0a_init_irq(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) plat_irq_setup_pins(IRQ_MODE_IRQ3210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) * The Machine Vector
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) static struct sh_machine_vector mv_apsh4ad0a __initmv = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) .mv_name = "AP-SH4AD-0A",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) .mv_setup = apsh4ad0a_setup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) .mv_mode_pins = apsh4ad0a_mode_pins,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) .mv_clk_init = apsh4ad0a_clk_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) .mv_init_irq = apsh4ad0a_init_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) };
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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