^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright IBM Corp. 2012
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Author(s):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Jan Glauber <jang@linux.vnet.ibm.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * The System z PCI code is a rewrite from a prototype by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * the following people (Kudoz!):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Alexander Schmidt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * Christoph Raisch
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * Hannes Hering
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * Hoang-Nam Nguyen
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * Jan-Bernd Themann
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * Stefan Roscher
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * Thomas Klein
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define KMSG_COMPONENT "zpci"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/export.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/seq_file.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/jump_label.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/printk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <asm/isc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <asm/airq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <asm/facility.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <asm/pci_insn.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #include <asm/pci_clp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include <asm/pci_dma.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #include "pci_bus.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #include "pci_iov.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) /* list of all detected zpci devices */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) static LIST_HEAD(zpci_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) static DEFINE_SPINLOCK(zpci_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) static DECLARE_BITMAP(zpci_domain, ZPCI_DOMAIN_BITMAP_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) static DEFINE_SPINLOCK(zpci_domain_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define ZPCI_IOMAP_ENTRIES \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) min(((unsigned long) ZPCI_NR_DEVICES * PCI_STD_NUM_BARS / 2), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) ZPCI_IOMAP_MAX_ENTRIES)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) unsigned int s390_pci_no_rid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) static DEFINE_SPINLOCK(zpci_iomap_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) static unsigned long *zpci_iomap_bitmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) struct zpci_iomap_entry *zpci_iomap_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) EXPORT_SYMBOL_GPL(zpci_iomap_start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) DEFINE_STATIC_KEY_FALSE(have_mio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) static struct kmem_cache *zdev_fmb_cache;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) struct zpci_dev *get_zdev_by_fid(u32 fid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) struct zpci_dev *tmp, *zdev = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) spin_lock(&zpci_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) list_for_each_entry(tmp, &zpci_list, entry) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) if (tmp->fid == fid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) zdev = tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) spin_unlock(&zpci_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) return zdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) void zpci_remove_reserved_devices(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) struct zpci_dev *tmp, *zdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) enum zpci_state state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) LIST_HEAD(remove);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) spin_lock(&zpci_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) list_for_each_entry_safe(zdev, tmp, &zpci_list, entry) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) if (zdev->state == ZPCI_FN_STATE_STANDBY &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) !clp_get_state(zdev->fid, &state) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) state == ZPCI_FN_STATE_RESERVED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) list_move_tail(&zdev->entry, &remove);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) spin_unlock(&zpci_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) list_for_each_entry_safe(zdev, tmp, &remove, entry)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) zpci_device_reserved(zdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) int pci_domain_nr(struct pci_bus *bus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) return ((struct zpci_bus *) bus->sysdata)->domain_nr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) EXPORT_SYMBOL_GPL(pci_domain_nr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) int pci_proc_domain(struct pci_bus *bus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) return pci_domain_nr(bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) EXPORT_SYMBOL_GPL(pci_proc_domain);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) /* Modify PCI: Register I/O address translation parameters */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) int zpci_register_ioat(struct zpci_dev *zdev, u8 dmaas,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) u64 base, u64 limit, u64 iota)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) u64 req = ZPCI_CREATE_REQ(zdev->fh, dmaas, ZPCI_MOD_FC_REG_IOAT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) struct zpci_fib fib = {0};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) u8 status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) WARN_ON_ONCE(iota & 0x3fff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) fib.pba = base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) fib.pal = limit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) fib.iota = iota | ZPCI_IOTA_RTTO_FLAG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) return zpci_mod_fc(req, &fib, &status) ? -EIO : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) /* Modify PCI: Unregister I/O address translation parameters */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) int zpci_unregister_ioat(struct zpci_dev *zdev, u8 dmaas)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) u64 req = ZPCI_CREATE_REQ(zdev->fh, dmaas, ZPCI_MOD_FC_DEREG_IOAT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) struct zpci_fib fib = {0};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) u8 cc, status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) cc = zpci_mod_fc(req, &fib, &status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) if (cc == 3) /* Function already gone. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) cc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) return cc ? -EIO : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) /* Modify PCI: Set PCI function measurement parameters */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) int zpci_fmb_enable_device(struct zpci_dev *zdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_SET_MEASURE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) struct zpci_fib fib = {0};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) u8 cc, status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) if (zdev->fmb || sizeof(*zdev->fmb) < zdev->fmb_length)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) zdev->fmb = kmem_cache_zalloc(zdev_fmb_cache, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) if (!zdev->fmb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) WARN_ON((u64) zdev->fmb & 0xf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) /* reset software counters */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) atomic64_set(&zdev->allocated_pages, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) atomic64_set(&zdev->mapped_pages, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) atomic64_set(&zdev->unmapped_pages, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) fib.fmb_addr = virt_to_phys(zdev->fmb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) cc = zpci_mod_fc(req, &fib, &status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) if (cc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) kmem_cache_free(zdev_fmb_cache, zdev->fmb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) zdev->fmb = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) return cc ? -EIO : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) /* Modify PCI: Disable PCI function measurement */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) int zpci_fmb_disable_device(struct zpci_dev *zdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_SET_MEASURE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) struct zpci_fib fib = {0};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) u8 cc, status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) if (!zdev->fmb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) /* Function measurement is disabled if fmb address is zero */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) cc = zpci_mod_fc(req, &fib, &status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) if (cc == 3) /* Function already gone. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) cc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) if (!cc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) kmem_cache_free(zdev_fmb_cache, zdev->fmb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) zdev->fmb = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) return cc ? -EIO : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) static int zpci_cfg_load(struct zpci_dev *zdev, int offset, u32 *val, u8 len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) u64 req = ZPCI_CREATE_REQ(zdev->fh, ZPCI_PCIAS_CFGSPC, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) u64 data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) rc = __zpci_load(&data, req, offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) if (!rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) data = le64_to_cpu((__force __le64) data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) data >>= (8 - len) * 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) *val = (u32) data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) *val = 0xffffffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) static int zpci_cfg_store(struct zpci_dev *zdev, int offset, u32 val, u8 len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) u64 req = ZPCI_CREATE_REQ(zdev->fh, ZPCI_PCIAS_CFGSPC, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) u64 data = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) data <<= (8 - len) * 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) data = (__force u64) cpu_to_le64(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) rc = __zpci_store(data, req, offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) resource_size_t pcibios_align_resource(void *data, const struct resource *res,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) resource_size_t size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) resource_size_t align)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) /* combine single writes by using store-block insn */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) void __iowrite64_copy(void __iomem *to, const void *from, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) zpci_memcpy_toio(to, from, count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) static void __iomem *__ioremap(phys_addr_t addr, size_t size, pgprot_t prot)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) unsigned long offset, vaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) struct vm_struct *area;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) phys_addr_t last_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) last_addr = addr + size - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) if (!size || last_addr < addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) if (!static_branch_unlikely(&have_mio))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) return (void __iomem *) addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) offset = addr & ~PAGE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) addr &= PAGE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) size = PAGE_ALIGN(size + offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) area = get_vm_area(size, VM_IOREMAP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) if (!area)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) vaddr = (unsigned long) area->addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) if (ioremap_page_range(vaddr, vaddr + size, addr, prot)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) free_vm_area(area);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) return (void __iomem *) ((unsigned long) area->addr + offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) void __iomem *ioremap_prot(phys_addr_t addr, size_t size, unsigned long prot)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) return __ioremap(addr, size, __pgprot(prot));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) EXPORT_SYMBOL(ioremap_prot);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) void __iomem *ioremap(phys_addr_t addr, size_t size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) return __ioremap(addr, size, PAGE_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) EXPORT_SYMBOL(ioremap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) void __iomem *ioremap_wc(phys_addr_t addr, size_t size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) return __ioremap(addr, size, pgprot_writecombine(PAGE_KERNEL));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) EXPORT_SYMBOL(ioremap_wc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) void __iomem *ioremap_wt(phys_addr_t addr, size_t size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) return __ioremap(addr, size, pgprot_writethrough(PAGE_KERNEL));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) EXPORT_SYMBOL(ioremap_wt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) void iounmap(volatile void __iomem *addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) if (static_branch_likely(&have_mio))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) vunmap((__force void *) ((unsigned long) addr & PAGE_MASK));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) EXPORT_SYMBOL(iounmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) /* Create a virtual mapping cookie for a PCI BAR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) static void __iomem *pci_iomap_range_fh(struct pci_dev *pdev, int bar,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) unsigned long offset, unsigned long max)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) struct zpci_dev *zdev = to_zpci(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) int idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) idx = zdev->bars[bar].map_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) spin_lock(&zpci_iomap_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) /* Detect overrun */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) WARN_ON(!++zpci_iomap_start[idx].count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) zpci_iomap_start[idx].fh = zdev->fh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) zpci_iomap_start[idx].bar = bar;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) spin_unlock(&zpci_iomap_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) return (void __iomem *) ZPCI_ADDR(idx) + offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) static void __iomem *pci_iomap_range_mio(struct pci_dev *pdev, int bar,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) unsigned long offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) unsigned long max)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) unsigned long barsize = pci_resource_len(pdev, bar);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) struct zpci_dev *zdev = to_zpci(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) void __iomem *iova;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) iova = ioremap((unsigned long) zdev->bars[bar].mio_wt, barsize);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) return iova ? iova + offset : iova;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) void __iomem *pci_iomap_range(struct pci_dev *pdev, int bar,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) unsigned long offset, unsigned long max)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) if (bar >= PCI_STD_NUM_BARS || !pci_resource_len(pdev, bar))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) if (static_branch_likely(&have_mio))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) return pci_iomap_range_mio(pdev, bar, offset, max);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) return pci_iomap_range_fh(pdev, bar, offset, max);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) EXPORT_SYMBOL(pci_iomap_range);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) return pci_iomap_range(dev, bar, 0, maxlen);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) EXPORT_SYMBOL(pci_iomap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) static void __iomem *pci_iomap_wc_range_mio(struct pci_dev *pdev, int bar,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) unsigned long offset, unsigned long max)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) unsigned long barsize = pci_resource_len(pdev, bar);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) struct zpci_dev *zdev = to_zpci(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) void __iomem *iova;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) iova = ioremap((unsigned long) zdev->bars[bar].mio_wb, barsize);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) return iova ? iova + offset : iova;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) void __iomem *pci_iomap_wc_range(struct pci_dev *pdev, int bar,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) unsigned long offset, unsigned long max)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) if (bar >= PCI_STD_NUM_BARS || !pci_resource_len(pdev, bar))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) if (static_branch_likely(&have_mio))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) return pci_iomap_wc_range_mio(pdev, bar, offset, max);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) return pci_iomap_range_fh(pdev, bar, offset, max);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) EXPORT_SYMBOL(pci_iomap_wc_range);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) void __iomem *pci_iomap_wc(struct pci_dev *dev, int bar, unsigned long maxlen)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) return pci_iomap_wc_range(dev, bar, 0, maxlen);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) EXPORT_SYMBOL(pci_iomap_wc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) static void pci_iounmap_fh(struct pci_dev *pdev, void __iomem *addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) unsigned int idx = ZPCI_IDX(addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) spin_lock(&zpci_iomap_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) /* Detect underrun */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) WARN_ON(!zpci_iomap_start[idx].count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) if (!--zpci_iomap_start[idx].count) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) zpci_iomap_start[idx].fh = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) zpci_iomap_start[idx].bar = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) spin_unlock(&zpci_iomap_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) static void pci_iounmap_mio(struct pci_dev *pdev, void __iomem *addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) iounmap(addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) void pci_iounmap(struct pci_dev *pdev, void __iomem *addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) if (static_branch_likely(&have_mio))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) pci_iounmap_mio(pdev, addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) pci_iounmap_fh(pdev, addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) EXPORT_SYMBOL(pci_iounmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) static int pci_read(struct pci_bus *bus, unsigned int devfn, int where,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) int size, u32 *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) struct zpci_dev *zdev = get_zdev_by_bus(bus, devfn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) return (zdev) ? zpci_cfg_load(zdev, where, val, size) : -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) static int pci_write(struct pci_bus *bus, unsigned int devfn, int where,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) int size, u32 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) struct zpci_dev *zdev = get_zdev_by_bus(bus, devfn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) return (zdev) ? zpci_cfg_store(zdev, where, val, size) : -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) static struct pci_ops pci_root_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) .read = pci_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) .write = pci_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) static void zpci_map_resources(struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) struct zpci_dev *zdev = to_zpci(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) resource_size_t len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) for (i = 0; i < PCI_STD_NUM_BARS; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) len = pci_resource_len(pdev, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) if (!len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) if (zpci_use_mio(zdev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) pdev->resource[i].start =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) (resource_size_t __force) zdev->bars[i].mio_wt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) pdev->resource[i].start = (resource_size_t __force)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) pci_iomap_range_fh(pdev, i, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) pdev->resource[i].end = pdev->resource[i].start + len - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) zpci_iov_map_resources(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) static void zpci_unmap_resources(struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) struct zpci_dev *zdev = to_zpci(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) resource_size_t len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) if (zpci_use_mio(zdev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) for (i = 0; i < PCI_STD_NUM_BARS; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) len = pci_resource_len(pdev, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) if (!len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) pci_iounmap_fh(pdev, (void __iomem __force *)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) pdev->resource[i].start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) static int zpci_alloc_iomap(struct zpci_dev *zdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) unsigned long entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) spin_lock(&zpci_iomap_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) entry = find_first_zero_bit(zpci_iomap_bitmap, ZPCI_IOMAP_ENTRIES);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) if (entry == ZPCI_IOMAP_ENTRIES) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) spin_unlock(&zpci_iomap_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) return -ENOSPC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) set_bit(entry, zpci_iomap_bitmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) spin_unlock(&zpci_iomap_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) return entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) static void zpci_free_iomap(struct zpci_dev *zdev, int entry)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) spin_lock(&zpci_iomap_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) memset(&zpci_iomap_start[entry], 0, sizeof(struct zpci_iomap_entry));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) clear_bit(entry, zpci_iomap_bitmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) spin_unlock(&zpci_iomap_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) static struct resource *__alloc_res(struct zpci_dev *zdev, unsigned long start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) unsigned long size, unsigned long flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) struct resource *r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) r = kzalloc(sizeof(*r), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) if (!r)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) r->start = start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) r->end = r->start + size - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) r->flags = flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) r->name = zdev->res_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) if (request_resource(&iomem_resource, r)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) kfree(r);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) return r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) int zpci_setup_bus_resources(struct zpci_dev *zdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) struct list_head *resources)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) unsigned long addr, size, flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) int i, entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) snprintf(zdev->res_name, sizeof(zdev->res_name),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) "PCI Bus %04x:%02x", zdev->uid, ZPCI_BUS_NR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) for (i = 0; i < PCI_STD_NUM_BARS; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) if (!zdev->bars[i].size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) entry = zpci_alloc_iomap(zdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) if (entry < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) return entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) zdev->bars[i].map_idx = entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) /* only MMIO is supported */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) flags = IORESOURCE_MEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) if (zdev->bars[i].val & 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) flags |= IORESOURCE_PREFETCH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) if (zdev->bars[i].val & 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) flags |= IORESOURCE_MEM_64;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) if (zpci_use_mio(zdev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) addr = (unsigned long) zdev->bars[i].mio_wt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) addr = ZPCI_ADDR(entry);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) size = 1UL << zdev->bars[i].size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) res = __alloc_res(zdev, addr, size, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) if (!res) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) zpci_free_iomap(zdev, entry);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) zdev->bars[i].res = res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) pci_add_resource(resources, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) static void zpci_cleanup_bus_resources(struct zpci_dev *zdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) for (i = 0; i < PCI_STD_NUM_BARS; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) if (!zdev->bars[i].size || !zdev->bars[i].res)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) zpci_free_iomap(zdev, zdev->bars[i].map_idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) release_resource(zdev->bars[i].res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) kfree(zdev->bars[i].res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) int pcibios_add_device(struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) struct zpci_dev *zdev = to_zpci(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) /* The pdev has a reference to the zdev via its bus */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) zpci_zdev_get(zdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) if (pdev->is_physfn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) pdev->no_vf_scan = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) pdev->dev.groups = zpci_attr_groups;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) pdev->dev.dma_ops = &s390_pci_dma_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) zpci_map_resources(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) for (i = 0; i < PCI_STD_NUM_BARS; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) res = &pdev->resource[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) if (res->parent || !res->flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) pci_claim_resource(pdev, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) void pcibios_release_device(struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) struct zpci_dev *zdev = to_zpci(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) zpci_unmap_resources(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) zpci_zdev_put(zdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) int pcibios_enable_device(struct pci_dev *pdev, int mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) struct zpci_dev *zdev = to_zpci(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) zpci_debug_init_device(zdev, dev_name(&pdev->dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) zpci_fmb_enable_device(zdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) return pci_enable_resources(pdev, mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) void pcibios_disable_device(struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) struct zpci_dev *zdev = to_zpci(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) zpci_fmb_disable_device(zdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) zpci_debug_exit_device(zdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) static int __zpci_register_domain(int domain)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) spin_lock(&zpci_domain_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) if (test_bit(domain, zpci_domain)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) spin_unlock(&zpci_domain_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) pr_err("Domain %04x is already assigned\n", domain);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) return -EEXIST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) set_bit(domain, zpci_domain);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) spin_unlock(&zpci_domain_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) return domain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) static int __zpci_alloc_domain(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) int domain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) spin_lock(&zpci_domain_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) * We can always auto allocate domains below ZPCI_NR_DEVICES.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) * There is either a free domain or we have reached the maximum in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) * which case we would have bailed earlier.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) domain = find_first_zero_bit(zpci_domain, ZPCI_NR_DEVICES);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) set_bit(domain, zpci_domain);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) spin_unlock(&zpci_domain_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) return domain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) int zpci_alloc_domain(int domain)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) if (zpci_unique_uid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) if (domain)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) return __zpci_register_domain(domain);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) pr_warn("UID checking was active but no UID is provided: switching to automatic domain allocation\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) update_uid_checking(false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) return __zpci_alloc_domain();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) void zpci_free_domain(int domain)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) spin_lock(&zpci_domain_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) clear_bit(domain, zpci_domain);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) spin_unlock(&zpci_domain_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) int zpci_enable_device(struct zpci_dev *zdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) if (clp_enable_fh(zdev, ZPCI_NR_DMA_SPACES)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) rc = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) rc = zpci_dma_init_device(zdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) goto out_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) zdev->state = ZPCI_FN_STATE_ONLINE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) out_dma:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) clp_disable_fh(zdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) EXPORT_SYMBOL_GPL(zpci_enable_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) int zpci_disable_device(struct zpci_dev *zdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) zpci_dma_exit_device(zdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) * The zPCI function may already be disabled by the platform, this is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) * detected in clp_disable_fh() which becomes a no-op.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) return clp_disable_fh(zdev) ? -EIO : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) EXPORT_SYMBOL_GPL(zpci_disable_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) /* zpci_remove_device - Removes the given zdev from the PCI core
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) * @zdev: the zdev to be removed from the PCI core
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) * @set_error: if true the device's error state is set to permanent failure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) * Sets a zPCI device to a configured but offline state; the zPCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) * device is still accessible through its hotplug slot and the zPCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) * API but is removed from the common code PCI bus, making it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) * no longer available to drivers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) void zpci_remove_device(struct zpci_dev *zdev, bool set_error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) struct zpci_bus *zbus = zdev->zbus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) struct pci_dev *pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) if (!zdev->zbus->bus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) pdev = pci_get_slot(zbus->bus, zdev->devfn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) if (pdev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) if (set_error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) pdev->error_state = pci_channel_io_perm_failure;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) if (pdev->is_virtfn) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) zpci_iov_remove_virtfn(pdev, zdev->vfn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) /* balance pci_get_slot */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) pci_dev_put(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) pci_stop_and_remove_bus_device_locked(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) /* balance pci_get_slot */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) pci_dev_put(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) * zpci_create_device() - Create a new zpci_dev and add it to the zbus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) * @fid: Function ID of the device to be created
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) * @fh: Current Function Handle of the device to be created
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) * @state: Initial state after creation either Standby or Configured
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) * Creates a new zpci device and adds it to its, possibly newly created, zbus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) * as well as zpci_list.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) * Returns: 0 on success, an error value otherwise
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) int zpci_create_device(u32 fid, u32 fh, enum zpci_state state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) struct zpci_dev *zdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) zpci_dbg(3, "add fid:%x, fh:%x, c:%d\n", fid, fh, state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) zdev = kzalloc(sizeof(*zdev), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) if (!zdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) /* FID and Function Handle are the static/dynamic identifiers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) zdev->fid = fid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) zdev->fh = fh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) /* Query function properties and update zdev */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) rc = clp_query_pci_fn(zdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) zdev->state = state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) kref_init(&zdev->kref);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) mutex_init(&zdev->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) rc = zpci_init_iommu(zdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) if (zdev->state == ZPCI_FN_STATE_CONFIGURED) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) rc = zpci_enable_device(zdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) goto error_destroy_iommu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) rc = zpci_bus_device_register(zdev, &pci_root_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) goto error_disable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) spin_lock(&zpci_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) list_add_tail(&zdev->entry, &zpci_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) spin_unlock(&zpci_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) error_disable:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) if (zdev->state == ZPCI_FN_STATE_ONLINE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) zpci_disable_device(zdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) error_destroy_iommu:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) zpci_destroy_iommu(zdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) error:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) zpci_dbg(0, "add fid:%x, rc:%d\n", fid, rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) kfree(zdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) bool zpci_is_device_configured(struct zpci_dev *zdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) enum zpci_state state = zdev->state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) return state != ZPCI_FN_STATE_RESERVED &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) state != ZPCI_FN_STATE_STANDBY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) * zpci_device_reserved() - Mark device as resverved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) * @zdev: the zpci_dev that was reserved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) * Handle the case that a given zPCI function was reserved by another system.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) * After a call to this function the zpci_dev can not be found via
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) * get_zdev_by_fid() anymore but may still be accessible via existing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) * references though it will not be functional anymore.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) void zpci_device_reserved(struct zpci_dev *zdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) if (zdev->has_hp_slot)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) zpci_exit_slot(zdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) * Remove device from zpci_list as it is going away. This also
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) * makes sure we ignore subsequent zPCI events for this device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) spin_lock(&zpci_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) list_del(&zdev->entry);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) spin_unlock(&zpci_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) zdev->state = ZPCI_FN_STATE_RESERVED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) zpci_dbg(3, "rsv fid:%x\n", zdev->fid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) zpci_zdev_put(zdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) void zpci_release_device(struct kref *kref)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) struct zpci_dev *zdev = container_of(kref, struct zpci_dev, kref);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) if (zdev->zbus->bus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) zpci_remove_device(zdev, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) switch (zdev->state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) case ZPCI_FN_STATE_ONLINE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) case ZPCI_FN_STATE_CONFIGURED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) zpci_disable_device(zdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) case ZPCI_FN_STATE_STANDBY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) if (zdev->has_hp_slot)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) zpci_exit_slot(zdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) spin_lock(&zpci_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) list_del(&zdev->entry);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) spin_unlock(&zpci_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) zpci_dbg(3, "rsv fid:%x\n", zdev->fid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) case ZPCI_FN_STATE_RESERVED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) zpci_cleanup_bus_resources(zdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) zpci_bus_device_unregister(zdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) zpci_destroy_iommu(zdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) zpci_dbg(3, "rem fid:%x\n", zdev->fid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) kfree(zdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) int zpci_report_error(struct pci_dev *pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) struct zpci_report_error_header *report)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) struct zpci_dev *zdev = to_zpci(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) return sclp_pci_report(report, zdev->fh, zdev->fid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) EXPORT_SYMBOL(zpci_report_error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) static int zpci_mem_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) BUILD_BUG_ON(!is_power_of_2(__alignof__(struct zpci_fmb)) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) __alignof__(struct zpci_fmb) < sizeof(struct zpci_fmb));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) zdev_fmb_cache = kmem_cache_create("PCI_FMB_cache", sizeof(struct zpci_fmb),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) __alignof__(struct zpci_fmb), 0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) if (!zdev_fmb_cache)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) goto error_fmb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) zpci_iomap_start = kcalloc(ZPCI_IOMAP_ENTRIES,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) sizeof(*zpci_iomap_start), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) if (!zpci_iomap_start)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) goto error_iomap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) zpci_iomap_bitmap = kcalloc(BITS_TO_LONGS(ZPCI_IOMAP_ENTRIES),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) sizeof(*zpci_iomap_bitmap), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) if (!zpci_iomap_bitmap)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) goto error_iomap_bitmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) if (static_branch_likely(&have_mio))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) clp_setup_writeback_mio();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) error_iomap_bitmap:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) kfree(zpci_iomap_start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) error_iomap:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) kmem_cache_destroy(zdev_fmb_cache);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) error_fmb:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) static void zpci_mem_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) kfree(zpci_iomap_bitmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) kfree(zpci_iomap_start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) kmem_cache_destroy(zdev_fmb_cache);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) static unsigned int s390_pci_probe __initdata = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) unsigned int s390_pci_force_floating __initdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) static unsigned int s390_pci_initialized;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) char * __init pcibios_setup(char *str)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) if (!strcmp(str, "off")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) s390_pci_probe = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) if (!strcmp(str, "nomio")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) S390_lowcore.machine_flags &= ~MACHINE_FLAG_PCI_MIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) if (!strcmp(str, "force_floating")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) s390_pci_force_floating = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) if (!strcmp(str, "norid")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) s390_pci_no_rid = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) return str;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) bool zpci_is_enabled(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) return s390_pci_initialized;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) static int __init pci_base_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) if (!s390_pci_probe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) if (!test_facility(69) || !test_facility(71))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) if (MACHINE_HAS_PCI_MIO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) static_branch_enable(&have_mio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) ctl_set_bit(2, 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) rc = zpci_debug_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) rc = zpci_mem_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) goto out_mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) rc = zpci_irq_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) goto out_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) rc = zpci_dma_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) goto out_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) rc = clp_scan_pci_devices();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) goto out_find;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) s390_pci_initialized = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) out_find:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) zpci_dma_exit();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) out_dma:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) zpci_irq_exit();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) out_irq:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) zpci_mem_exit();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) out_mem:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) zpci_debug_exit();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) subsys_initcall_sync(pci_base_init);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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