^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright IBM Corp 2000, 2011
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Author(s): Holger Smolinski <Holger.Smolinski@de.ibm.com>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Denis Joseph Barrow,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/linkage.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <asm/asm-offsets.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <asm/nospec-insn.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <asm/sigp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) GEN_BR_THUNK %r9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) # Issue "store status" for the current CPU to its prefix page
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) # and call passed function afterwards
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) # r2 = Function to be called after store status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) # r3 = Parameter for function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) ENTRY(store_status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) /* Save register one and load save area base */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) stg %r1,__LC_SAVE_AREA_RESTART
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) /* General purpose registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) lghi %r1,__LC_GPREGS_SAVE_AREA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) stmg %r0,%r15,0(%r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) mvc 8(8,%r1),__LC_SAVE_AREA_RESTART
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) /* Control registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) lghi %r1,__LC_CREGS_SAVE_AREA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) stctg %c0,%c15,0(%r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) /* Access registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) lghi %r1,__LC_AREGS_SAVE_AREA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) stam %a0,%a15,0(%r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) /* Floating point registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) lghi %r1,__LC_FPREGS_SAVE_AREA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) std %f0, 0x00(%r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) std %f1, 0x08(%r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) std %f2, 0x10(%r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) std %f3, 0x18(%r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) std %f4, 0x20(%r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) std %f5, 0x28(%r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) std %f6, 0x30(%r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) std %f7, 0x38(%r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) std %f8, 0x40(%r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) std %f9, 0x48(%r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) std %f10,0x50(%r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) std %f11,0x58(%r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) std %f12,0x60(%r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) std %f13,0x68(%r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) std %f14,0x70(%r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) std %f15,0x78(%r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) /* Floating point control register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) lghi %r1,__LC_FP_CREG_SAVE_AREA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) stfpc 0(%r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) /* CPU timer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) lghi %r1,__LC_CPU_TIMER_SAVE_AREA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) stpt 0(%r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) /* Store prefix register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) lghi %r1,__LC_PREFIX_SAVE_AREA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) stpx 0(%r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) /* Clock comparator - seven bytes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) lghi %r1,__LC_CLOCK_COMP_SAVE_AREA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) larl %r4,.Lclkcmp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) stckc 0(%r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) mvc 1(7,%r1),1(%r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) /* Program status word */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) lghi %r1,__LC_PSW_SAVE_AREA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) epsw %r4,%r5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) st %r4,0(%r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) st %r5,4(%r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) stg %r2,8(%r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) lgr %r9,%r2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) lgr %r2,%r3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) BR_EX %r9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) ENDPROC(store_status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) .section .bss
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) .align 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) .Lclkcmp: .quad 0x0000000000000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) .previous
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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