^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Support for Vector Instructions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Assembler macros to generate .byte/.word code for particular
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * vector instructions that are supported by recent binutils (>= 2.26) only.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Copyright IBM Corp. 2015
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Author(s): Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #ifndef __ASM_S390_VX_INSN_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define __ASM_S390_VX_INSN_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #ifdef __ASSEMBLY__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) /* Macros to generate vector instruction byte code */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) /* GR_NUM - Retrieve general-purpose register number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * @opd: Operand to store register number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * @r64: String designation register in the format "%rN"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) .macro GR_NUM opd gr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) \opd = 255
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) .ifc \gr,%r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) \opd = 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) .ifc \gr,%r1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) \opd = 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) .ifc \gr,%r2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) \opd = 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) .ifc \gr,%r3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) \opd = 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) .ifc \gr,%r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) \opd = 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) .ifc \gr,%r5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) \opd = 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) .ifc \gr,%r6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) \opd = 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) .ifc \gr,%r7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) \opd = 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) .ifc \gr,%r8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) \opd = 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) .ifc \gr,%r9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) \opd = 9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) .ifc \gr,%r10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) \opd = 10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) .ifc \gr,%r11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) \opd = 11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) .ifc \gr,%r12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) \opd = 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) .ifc \gr,%r13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) \opd = 13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) .ifc \gr,%r14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) \opd = 14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) .ifc \gr,%r15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) \opd = 15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) .if \opd == 255
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) \opd = \gr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) /* VX_NUM - Retrieve vector register number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) * @opd: Operand to store register number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) * @vxr: String designation register in the format "%vN"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) * The vector register number is used for as input number to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) * instruction and, as well as, to compute the RXB field of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) * instruction.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) .macro VX_NUM opd vxr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) \opd = 255
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) .ifc \vxr,%v0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) \opd = 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) .ifc \vxr,%v1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) \opd = 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) .ifc \vxr,%v2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) \opd = 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) .ifc \vxr,%v3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) \opd = 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) .ifc \vxr,%v4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) \opd = 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) .ifc \vxr,%v5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) \opd = 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) .ifc \vxr,%v6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) \opd = 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) .ifc \vxr,%v7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) \opd = 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) .ifc \vxr,%v8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) \opd = 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) .ifc \vxr,%v9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) \opd = 9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) .ifc \vxr,%v10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) \opd = 10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) .ifc \vxr,%v11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) \opd = 11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) .ifc \vxr,%v12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) \opd = 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) .ifc \vxr,%v13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) \opd = 13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) .ifc \vxr,%v14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) \opd = 14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) .ifc \vxr,%v15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) \opd = 15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) .ifc \vxr,%v16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) \opd = 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) .ifc \vxr,%v17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) \opd = 17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) .ifc \vxr,%v18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) \opd = 18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) .ifc \vxr,%v19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) \opd = 19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) .ifc \vxr,%v20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) \opd = 20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) .ifc \vxr,%v21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) \opd = 21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) .ifc \vxr,%v22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) \opd = 22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) .ifc \vxr,%v23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) \opd = 23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) .ifc \vxr,%v24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) \opd = 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) .ifc \vxr,%v25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) \opd = 25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) .ifc \vxr,%v26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) \opd = 26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) .ifc \vxr,%v27
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) \opd = 27
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) .ifc \vxr,%v28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) \opd = 28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) .ifc \vxr,%v29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) \opd = 29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) .ifc \vxr,%v30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) \opd = 30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) .ifc \vxr,%v31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) \opd = 31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) .if \opd == 255
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) \opd = \vxr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) /* RXB - Compute most significant bit used vector registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) * @rxb: Operand to store computed RXB value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) * @v1: First vector register designated operand
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) * @v2: Second vector register designated operand
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) * @v3: Third vector register designated operand
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) * @v4: Fourth vector register designated operand
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) .macro RXB rxb v1 v2=0 v3=0 v4=0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) \rxb = 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) .if \v1 & 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) \rxb = \rxb | 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) .if \v2 & 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) \rxb = \rxb | 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) .if \v3 & 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) \rxb = \rxb | 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) .if \v4 & 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) \rxb = \rxb | 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) /* MRXB - Generate Element Size Control and RXB value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) * @m: Element size control
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) * @v1: First vector register designated operand (for RXB)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) * @v2: Second vector register designated operand (for RXB)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) * @v3: Third vector register designated operand (for RXB)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) * @v4: Fourth vector register designated operand (for RXB)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) .macro MRXB m v1 v2=0 v3=0 v4=0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) rxb = 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) RXB rxb, \v1, \v2, \v3, \v4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) .byte (\m << 4) | rxb
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) /* MRXBOPC - Generate Element Size Control, RXB, and final Opcode fields
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) * @m: Element size control
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) * @opc: Opcode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) * @v1: First vector register designated operand (for RXB)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) * @v2: Second vector register designated operand (for RXB)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) * @v3: Third vector register designated operand (for RXB)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) * @v4: Fourth vector register designated operand (for RXB)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) .macro MRXBOPC m opc v1 v2=0 v3=0 v4=0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) MRXB \m, \v1, \v2, \v3, \v4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) .byte \opc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) /* Vector support instructions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) /* VECTOR GENERATE BYTE MASK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) .macro VGBM vr imm2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) VX_NUM v1, \vr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) .word (0xE700 | ((v1&15) << 4))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) .word \imm2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) MRXBOPC 0, 0x44, v1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) .macro VZERO vxr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) VGBM \vxr, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) .macro VONE vxr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) VGBM \vxr, 0xFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) /* VECTOR LOAD VR ELEMENT FROM GR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) .macro VLVG v, gr, disp, m
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) VX_NUM v1, \v
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) GR_NUM b2, "%r0"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) GR_NUM r3, \gr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) .word 0xE700 | ((v1&15) << 4) | r3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) .word (b2 << 12) | (\disp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) MRXBOPC \m, 0x22, v1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) .macro VLVGB v, gr, index, base
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) VLVG \v, \gr, \index, \base, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) .macro VLVGH v, gr, index
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) VLVG \v, \gr, \index, 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) .macro VLVGF v, gr, index
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) VLVG \v, \gr, \index, 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) .macro VLVGG v, gr, index
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) VLVG \v, \gr, \index, 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) /* VECTOR LOAD REGISTER */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) .macro VLR v1, v2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) VX_NUM v1, \v1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) VX_NUM v2, \v2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) .word 0xE700 | ((v1&15) << 4) | (v2&15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) .word 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) MRXBOPC 0, 0x56, v1, v2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) /* VECTOR LOAD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) .macro VL v, disp, index="%r0", base
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) VX_NUM v1, \v
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) GR_NUM x2, \index
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) GR_NUM b2, \base
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) .word 0xE700 | ((v1&15) << 4) | x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) .word (b2 << 12) | (\disp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) MRXBOPC 0, 0x06, v1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) /* VECTOR LOAD ELEMENT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) .macro VLEx vr1, disp, index="%r0", base, m3, opc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) VX_NUM v1, \vr1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) GR_NUM x2, \index
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) GR_NUM b2, \base
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) .word 0xE700 | ((v1&15) << 4) | x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) .word (b2 << 12) | (\disp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) MRXBOPC \m3, \opc, v1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) .macro VLEB vr1, disp, index="%r0", base, m3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) VLEx \vr1, \disp, \index, \base, \m3, 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) .macro VLEH vr1, disp, index="%r0", base, m3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) VLEx \vr1, \disp, \index, \base, \m3, 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) .macro VLEF vr1, disp, index="%r0", base, m3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) VLEx \vr1, \disp, \index, \base, \m3, 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) .macro VLEG vr1, disp, index="%r0", base, m3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) VLEx \vr1, \disp, \index, \base, \m3, 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) /* VECTOR LOAD ELEMENT IMMEDIATE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) .macro VLEIx vr1, imm2, m3, opc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) VX_NUM v1, \vr1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) .word 0xE700 | ((v1&15) << 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) .word \imm2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) MRXBOPC \m3, \opc, v1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) .macro VLEIB vr1, imm2, index
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) VLEIx \vr1, \imm2, \index, 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) .macro VLEIH vr1, imm2, index
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) VLEIx \vr1, \imm2, \index, 0x41
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) .macro VLEIF vr1, imm2, index
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) VLEIx \vr1, \imm2, \index, 0x43
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) .macro VLEIG vr1, imm2, index
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) VLEIx \vr1, \imm2, \index, 0x42
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) /* VECTOR LOAD GR FROM VR ELEMENT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) .macro VLGV gr, vr, disp, base="%r0", m
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) GR_NUM r1, \gr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) GR_NUM b2, \base
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) VX_NUM v3, \vr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) .word 0xE700 | (r1 << 4) | (v3&15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) .word (b2 << 12) | (\disp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) MRXBOPC \m, 0x21, v3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) .macro VLGVB gr, vr, disp, base="%r0"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) VLGV \gr, \vr, \disp, \base, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) .macro VLGVH gr, vr, disp, base="%r0"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) VLGV \gr, \vr, \disp, \base, 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) .macro VLGVF gr, vr, disp, base="%r0"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) VLGV \gr, \vr, \disp, \base, 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) .macro VLGVG gr, vr, disp, base="%r0"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) VLGV \gr, \vr, \disp, \base, 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) /* VECTOR LOAD MULTIPLE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) .macro VLM vfrom, vto, disp, base, hint=3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) VX_NUM v1, \vfrom
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) VX_NUM v3, \vto
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) GR_NUM b2, \base /* Base register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) .word 0xE700 | ((v1&15) << 4) | (v3&15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) .word (b2 << 12) | (\disp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) MRXBOPC \hint, 0x36, v1, v3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) /* VECTOR STORE MULTIPLE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) .macro VSTM vfrom, vto, disp, base, hint=3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) VX_NUM v1, \vfrom
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) VX_NUM v3, \vto
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) GR_NUM b2, \base /* Base register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) .word 0xE700 | ((v1&15) << 4) | (v3&15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) .word (b2 << 12) | (\disp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) MRXBOPC \hint, 0x3E, v1, v3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) /* VECTOR PERMUTE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) .macro VPERM vr1, vr2, vr3, vr4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) VX_NUM v1, \vr1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) VX_NUM v2, \vr2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) VX_NUM v3, \vr3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) VX_NUM v4, \vr4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) .word 0xE700 | ((v1&15) << 4) | (v2&15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) .word ((v3&15) << 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) MRXBOPC (v4&15), 0x8C, v1, v2, v3, v4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) /* VECTOR UNPACK LOGICAL LOW */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) .macro VUPLL vr1, vr2, m3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) VX_NUM v1, \vr1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) VX_NUM v2, \vr2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) .word 0xE700 | ((v1&15) << 4) | (v2&15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) .word 0x0000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) MRXBOPC \m3, 0xD4, v1, v2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) .macro VUPLLB vr1, vr2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) VUPLL \vr1, \vr2, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) .macro VUPLLH vr1, vr2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) VUPLL \vr1, \vr2, 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) .macro VUPLLF vr1, vr2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) VUPLL \vr1, \vr2, 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) /* Vector integer instructions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) /* VECTOR AND */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) .macro VN vr1, vr2, vr3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) VX_NUM v1, \vr1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) VX_NUM v2, \vr2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) VX_NUM v3, \vr3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) .word 0xE700 | ((v1&15) << 4) | (v2&15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) .word ((v3&15) << 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) MRXBOPC 0, 0x68, v1, v2, v3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) /* VECTOR EXCLUSIVE OR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) .macro VX vr1, vr2, vr3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) VX_NUM v1, \vr1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) VX_NUM v2, \vr2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) VX_NUM v3, \vr3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) .word 0xE700 | ((v1&15) << 4) | (v2&15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) .word ((v3&15) << 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) MRXBOPC 0, 0x6D, v1, v2, v3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) /* VECTOR GALOIS FIELD MULTIPLY SUM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) .macro VGFM vr1, vr2, vr3, m4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) VX_NUM v1, \vr1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) VX_NUM v2, \vr2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) VX_NUM v3, \vr3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) .word 0xE700 | ((v1&15) << 4) | (v2&15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) .word ((v3&15) << 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) MRXBOPC \m4, 0xB4, v1, v2, v3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) .macro VGFMB vr1, vr2, vr3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) VGFM \vr1, \vr2, \vr3, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) .macro VGFMH vr1, vr2, vr3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) VGFM \vr1, \vr2, \vr3, 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) .macro VGFMF vr1, vr2, vr3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) VGFM \vr1, \vr2, \vr3, 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) .macro VGFMG vr1, vr2, vr3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) VGFM \vr1, \vr2, \vr3, 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) /* VECTOR GALOIS FIELD MULTIPLY SUM AND ACCUMULATE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) .macro VGFMA vr1, vr2, vr3, vr4, m5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) VX_NUM v1, \vr1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) VX_NUM v2, \vr2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) VX_NUM v3, \vr3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) VX_NUM v4, \vr4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) .word 0xE700 | ((v1&15) << 4) | (v2&15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) .word ((v3&15) << 12) | (\m5 << 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) MRXBOPC (v4&15), 0xBC, v1, v2, v3, v4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) .macro VGFMAB vr1, vr2, vr3, vr4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) VGFMA \vr1, \vr2, \vr3, \vr4, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) .macro VGFMAH vr1, vr2, vr3, vr4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) VGFMA \vr1, \vr2, \vr3, \vr4, 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) .macro VGFMAF vr1, vr2, vr3, vr4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) VGFMA \vr1, \vr2, \vr3, \vr4, 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) .macro VGFMAG vr1, vr2, vr3, vr4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) VGFMA \vr1, \vr2, \vr3, \vr4, 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) /* VECTOR SHIFT RIGHT LOGICAL BY BYTE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) .macro VSRLB vr1, vr2, vr3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) VX_NUM v1, \vr1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) VX_NUM v2, \vr2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) VX_NUM v3, \vr3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) .word 0xE700 | ((v1&15) << 4) | (v2&15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) .word ((v3&15) << 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) MRXBOPC 0, 0x7D, v1, v2, v3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) /* VECTOR REPLICATE IMMEDIATE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) .macro VREPI vr1, imm2, m3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) VX_NUM v1, \vr1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) .word 0xE700 | ((v1&15) << 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) .word \imm2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) MRXBOPC \m3, 0x45, v1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) .macro VREPIB vr1, imm2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) VREPI \vr1, \imm2, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) .macro VREPIH vr1, imm2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) VREPI \vr1, \imm2, 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) .macro VREPIF vr1, imm2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) VREPI \vr1, \imm2, 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) .macro VREPIG vr1, imm2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) VREP \vr1, \imm2, 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) /* VECTOR ADD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) .macro VA vr1, vr2, vr3, m4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) VX_NUM v1, \vr1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) VX_NUM v2, \vr2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) VX_NUM v3, \vr3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) .word 0xE700 | ((v1&15) << 4) | (v2&15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) .word ((v3&15) << 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) MRXBOPC \m4, 0xF3, v1, v2, v3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) .macro VAB vr1, vr2, vr3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) VA \vr1, \vr2, \vr3, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) .macro VAH vr1, vr2, vr3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) VA \vr1, \vr2, \vr3, 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) .macro VAF vr1, vr2, vr3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) VA \vr1, \vr2, \vr3, 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) .macro VAG vr1, vr2, vr3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) VA \vr1, \vr2, \vr3, 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) .macro VAQ vr1, vr2, vr3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) VA \vr1, \vr2, \vr3, 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) /* VECTOR ELEMENT SHIFT RIGHT ARITHMETIC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) .macro VESRAV vr1, vr2, vr3, m4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) VX_NUM v1, \vr1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) VX_NUM v2, \vr2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) VX_NUM v3, \vr3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) .word 0xE700 | ((v1&15) << 4) | (v2&15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) .word ((v3&15) << 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) MRXBOPC \m4, 0x7A, v1, v2, v3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) .macro VESRAVB vr1, vr2, vr3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) VESRAV \vr1, \vr2, \vr3, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) .macro VESRAVH vr1, vr2, vr3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) VESRAV \vr1, \vr2, \vr3, 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) .macro VESRAVF vr1, vr2, vr3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) VESRAV \vr1, \vr2, \vr3, 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) .macro VESRAVG vr1, vr2, vr3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) VESRAV \vr1, \vr2, \vr3, 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) #endif /* __ASSEMBLY__ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) #endif /* __ASM_S390_VX_INSN_H */