Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Copyright IBM Corp. 2000, 2008
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Author(s): Utz Bacher <utz.bacher@de.ibm.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *	      Jan Glauber <jang@linux.vnet.ibm.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #ifndef __QDIO_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #define __QDIO_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <asm/cio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <asm/ccwdev.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) /* only use 4 queues to save some cachelines */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #define QDIO_MAX_QUEUES_PER_IRQ		4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #define QDIO_MAX_BUFFERS_PER_Q		128
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #define QDIO_MAX_BUFFERS_MASK		(QDIO_MAX_BUFFERS_PER_Q - 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #define QDIO_BUFNR(num)			((num) & QDIO_MAX_BUFFERS_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #define QDIO_MAX_ELEMENTS_PER_BUFFER	16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #define QDIO_SBAL_SIZE			256
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #define QDIO_QETH_QFMT			0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #define QDIO_ZFCP_QFMT			1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define QDIO_IQDIO_QFMT			2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28)  * struct qdesfmt0 - queue descriptor, format 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29)  * @sliba: absolute address of storage list information block
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30)  * @sla: absolute address of storage list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31)  * @slsba: absolute address of storage list state block
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32)  * @akey: access key for SLIB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33)  * @bkey: access key for SL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34)  * @ckey: access key for SBALs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35)  * @dkey: access key for SLSB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) struct qdesfmt0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	u64 sliba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	u64 sla;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	u64 slsba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	u32	 : 32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	u32 akey : 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	u32 bkey : 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	u32 ckey : 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	u32 dkey : 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	u32	 : 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) } __attribute__ ((packed));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) #define QDR_AC_MULTI_BUFFER_ENABLE 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52)  * struct qdr - queue description record (QDR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53)  * @qfmt: queue format
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54)  * @ac: adapter characteristics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55)  * @iqdcnt: input queue descriptor count
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56)  * @oqdcnt: output queue descriptor count
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57)  * @iqdsz: input queue descriptor size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58)  * @oqdsz: output queue descriptor size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59)  * @qiba: absolute address of queue information block
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60)  * @qkey: queue information block key
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61)  * @qdf0: queue descriptions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) struct qdr {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	u32 qfmt   : 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	u32	   : 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	u32 ac	   : 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	u32	   : 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	u32 iqdcnt : 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	u32	   : 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	u32 oqdcnt : 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	u32	   : 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	u32 iqdsz  : 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	u32	   : 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	u32 oqdsz  : 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	/* private: */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	u32 res[9];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	/* public: */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	u64 qiba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	u32	   : 32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	u32 qkey   : 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	u32	   : 28;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	struct qdesfmt0 qdf0[126];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) } __packed __aligned(PAGE_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) #define QIB_AC_OUTBOUND_PCI_SUPPORTED	0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) #define QIB_RFLAGS_ENABLE_QEBSM		0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) #define QIB_RFLAGS_ENABLE_DATA_DIV	0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90)  * struct qib - queue information block (QIB)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91)  * @qfmt: queue format
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92)  * @pfmt: implementation dependent parameter format
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93)  * @rflags: QEBSM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94)  * @ac: adapter characteristics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95)  * @isliba: absolute address of first input SLIB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96)  * @osliba: absolute address of first output SLIB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97)  * @ebcnam: adapter identifier in EBCDIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98)  * @parm: implementation dependent parameters
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) struct qib {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	u32 qfmt   : 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	u32 pfmt   : 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	u32 rflags : 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	u32 ac	   : 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	u32	   : 32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	u64 isliba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	u64 osliba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	u32	   : 32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	u32	   : 32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	u8 ebcnam[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	/* private: */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	u8 res[88];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	/* public: */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	u8 parm[128];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) } __attribute__ ((packed, aligned(256)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)  * struct slibe - storage list information block element (SLIBE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)  * @parms: implementation dependent parameters
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) struct slibe {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	u64 parms;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)  * struct qaob - queue asynchronous operation block
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)  * @res0: reserved parameters
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)  * @res1: reserved parameter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)  * @res2: reserved parameter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)  * @res3: reserved parameter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)  * @aorc: asynchronous operation return code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)  * @flags: internal flags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)  * @cbtbs: control block type
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)  * @sb_count: number of storage blocks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)  * @sba: storage block element addresses
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)  * @dcount: size of storage block elements
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)  * @user0: user defineable value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)  * @res4: reserved paramater
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)  * @user1: user defineable value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)  * @user2: user defineable value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) struct qaob {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	u64 res0[6];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	u8 res1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	u8 res2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	u8 res3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	u8 aorc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	u8 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	u16 cbtbs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	u8 sb_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	u64 sba[QDIO_MAX_ELEMENTS_PER_BUFFER];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	u16 dcount[QDIO_MAX_ELEMENTS_PER_BUFFER];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	u64 user0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	u64 res4[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	u64 user1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	u64 user2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) } __attribute__ ((packed, aligned(256)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)  * struct slib - storage list information block (SLIB)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)  * @nsliba: next SLIB address (if any)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)  * @sla: SL address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)  * @slsba: SLSB address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)  * @slibe: SLIB elements
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) struct slib {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	u64 nsliba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	u64 sla;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	u64 slsba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	/* private: */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	u8 res[1000];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	/* public: */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	struct slibe slibe[QDIO_MAX_BUFFERS_PER_Q];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) } __attribute__ ((packed, aligned(2048)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) #define SBAL_EFLAGS_LAST_ENTRY		0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) #define SBAL_EFLAGS_CONTIGUOUS		0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) #define SBAL_EFLAGS_FIRST_FRAG		0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) #define SBAL_EFLAGS_MIDDLE_FRAG		0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) #define SBAL_EFLAGS_LAST_FRAG		0x0c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) #define SBAL_EFLAGS_MASK		0x6f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) #define SBAL_SFLAGS0_PCI_REQ		0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) #define SBAL_SFLAGS0_DATA_CONTINUATION	0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) /* Awesome OpenFCP extensions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) #define SBAL_SFLAGS0_TYPE_STATUS	0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) #define SBAL_SFLAGS0_TYPE_WRITE		0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) #define SBAL_SFLAGS0_TYPE_READ		0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) #define SBAL_SFLAGS0_TYPE_WRITE_READ	0x18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) #define SBAL_SFLAGS0_MORE_SBALS		0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) #define SBAL_SFLAGS0_COMMAND		0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) #define SBAL_SFLAGS0_LAST_SBAL		0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) #define SBAL_SFLAGS0_ONLY_SBAL		SBAL_SFLAGS0_COMMAND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) #define SBAL_SFLAGS0_MIDDLE_SBAL	SBAL_SFLAGS0_MORE_SBALS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) #define SBAL_SFLAGS0_FIRST_SBAL (SBAL_SFLAGS0_MORE_SBALS | SBAL_SFLAGS0_COMMAND)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)  * struct qdio_buffer_element - SBAL entry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)  * @eflags: SBAL entry flags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)  * @scount: SBAL count
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)  * @sflags: whole SBAL flags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)  * @length: length
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)  * @addr: absolute data address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) struct qdio_buffer_element {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	u8 eflags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	/* private: */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	u8 res1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	/* public: */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	u8 scount;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	u8 sflags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	u32 length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	u64 addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) } __attribute__ ((packed, aligned(16)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)  * struct qdio_buffer - storage block address list (SBAL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)  * @element: SBAL entries
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) struct qdio_buffer {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	struct qdio_buffer_element element[QDIO_MAX_ELEMENTS_PER_BUFFER];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) } __attribute__ ((packed, aligned(256)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)  * struct sl_element - storage list entry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)  * @sbal: absolute SBAL address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) struct sl_element {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	u64 sbal;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) } __attribute__ ((packed));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)  * struct sl - storage list (SL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)  * @element: SL entries
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) struct sl {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	struct sl_element element[QDIO_MAX_BUFFERS_PER_Q];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) } __attribute__ ((packed, aligned(1024)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)  * struct slsb - storage list state block (SLSB)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)  * @val: state per buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) struct slsb {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	u8 val[QDIO_MAX_BUFFERS_PER_Q];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) } __attribute__ ((packed, aligned(256)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)  * struct qdio_outbuf_state - SBAL related asynchronous operation information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)  *   (for communication with upper layer programs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)  *   (only required for use with completion queues)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)  * @flags: flags indicating state of buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)  * @user: pointer to upper layer program's state information related to SBAL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)  *        (stored in user1 data of QAOB)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) struct qdio_outbuf_state {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	u8 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	void *user;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) #define QDIO_OUTBUF_STATE_FLAG_PENDING	0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) #define CHSC_AC1_INITIATE_INPUTQ	0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) /* qdio adapter-characteristics-1 flag */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) #define AC1_SIGA_INPUT_NEEDED		0x40	/* process input queues */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) #define AC1_SIGA_OUTPUT_NEEDED		0x20	/* process output queues */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) #define AC1_SIGA_SYNC_NEEDED		0x10	/* ask hypervisor to sync */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) #define AC1_AUTOMATIC_SYNC_ON_THININT	0x08	/* set by hypervisor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) #define AC1_AUTOMATIC_SYNC_ON_OUT_PCI	0x04	/* set by hypervisor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) #define AC1_SC_QEBSM_AVAILABLE		0x02	/* available for subchannel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) #define AC1_SC_QEBSM_ENABLED		0x01	/* enabled for subchannel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) #define CHSC_AC2_MULTI_BUFFER_AVAILABLE	0x0080
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) #define CHSC_AC2_MULTI_BUFFER_ENABLED	0x0040
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) #define CHSC_AC2_DATA_DIV_AVAILABLE	0x0010
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) #define CHSC_AC2_SNIFFER_AVAILABLE	0x0008
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) #define CHSC_AC2_DATA_DIV_ENABLED	0x0002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) #define CHSC_AC3_FORMAT2_CQ_AVAILABLE	0x8000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) struct qdio_ssqd_desc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	u8 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 	u8:8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 	u16 sch;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	u8 qfmt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	u8 parm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 	u8 qdioac1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 	u8 sch_class;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	u8 pcnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	u8 icnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	u8:8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	u8 ocnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	u8:8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 	u8 mbccnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	u16 qdioac2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	u64 sch_token;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 	u8 mro;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	u8 mri;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	u16 qdioac3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	u16:16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 	u8:8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	u8 mmwc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) } __attribute__ ((packed));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) /* params are: ccw_device, qdio_error, queue_number,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309)    first element processed, number of elements processed, int_parm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) typedef void qdio_handler_t(struct ccw_device *, unsigned int, int,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 			    int, int, unsigned long);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) /* qdio errors reported to the upper-layer program */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) #define QDIO_ERROR_ACTIVATE			0x0001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) #define QDIO_ERROR_GET_BUF_STATE		0x0002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) #define QDIO_ERROR_SET_BUF_STATE		0x0004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) #define QDIO_ERROR_SLSB_STATE			0x0100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) #define QDIO_ERROR_FATAL			0x00ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) #define QDIO_ERROR_TEMPORARY			0xff00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) /* for qdio_cleanup */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) #define QDIO_FLAG_CLEANUP_USING_CLEAR		0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) #define QDIO_FLAG_CLEANUP_USING_HALT		0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)  * struct qdio_initialize - qdio initialization data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)  * @q_format: queue format
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329)  * @qdr_ac: feature flags to set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330)  * @qib_param_field_format: format for qib_parm_field
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)  * @qib_param_field: pointer to 128 bytes or NULL, if no param field
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)  * @qib_rflags: rflags to set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333)  * @input_slib_elements: pointer to no_input_qs * 128 words of data or NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334)  * @output_slib_elements: pointer to no_output_qs * 128 words of data or NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)  * @no_input_qs: number of input queues
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336)  * @no_output_qs: number of output queues
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)  * @input_handler: handler to be called for input queues
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338)  * @output_handler: handler to be called for output queues
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339)  * @irq_poll: Data IRQ polling handler (NULL when not supported)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340)  * @scan_threshold: # of in-use buffers that triggers scan on output queue
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341)  * @int_parm: interruption parameter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)  * @input_sbal_addr_array:  per-queue array, each element points to 128 SBALs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343)  * @output_sbal_addr_array: per-queue array, each element points to 128 SBALs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344)  * @output_sbal_state_array: no_output_qs * 128 state info (for CQ or NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) struct qdio_initialize {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 	unsigned char q_format;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 	unsigned char qdr_ac;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 	unsigned int qib_param_field_format;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 	unsigned char *qib_param_field;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 	unsigned char qib_rflags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 	unsigned long *input_slib_elements;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 	unsigned long *output_slib_elements;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 	unsigned int no_input_qs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 	unsigned int no_output_qs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 	qdio_handler_t *input_handler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 	qdio_handler_t *output_handler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 	void (*irq_poll)(struct ccw_device *cdev, unsigned long data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 	unsigned int scan_threshold;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 	unsigned long int_parm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 	struct qdio_buffer ***input_sbal_addr_array;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 	struct qdio_buffer ***output_sbal_addr_array;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 	struct qdio_outbuf_state *output_sbal_state_array;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) #define QDIO_STATE_INACTIVE		0x00000002 /* after qdio_cleanup */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) #define QDIO_STATE_ESTABLISHED		0x00000004 /* after qdio_establish */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) #define QDIO_STATE_ACTIVE		0x00000008 /* after qdio_activate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) #define QDIO_STATE_STOPPED		0x00000010 /* after queues went down */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) #define QDIO_FLAG_SYNC_INPUT		0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) #define QDIO_FLAG_SYNC_OUTPUT		0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) #define QDIO_FLAG_PCI_OUT		0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) int qdio_alloc_buffers(struct qdio_buffer **buf, unsigned int count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) void qdio_free_buffers(struct qdio_buffer **buf, unsigned int count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) void qdio_reset_buffers(struct qdio_buffer **buf, unsigned int count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) extern int qdio_allocate(struct ccw_device *cdev, unsigned int no_input_qs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 			 unsigned int no_output_qs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) extern int qdio_establish(struct ccw_device *cdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 			  struct qdio_initialize *init_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) extern int qdio_activate(struct ccw_device *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) extern void qdio_release_aob(struct qaob *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) extern int do_QDIO(struct ccw_device *, unsigned int, int, unsigned int,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 		   unsigned int);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) extern int qdio_start_irq(struct ccw_device *cdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) extern int qdio_stop_irq(struct ccw_device *cdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) extern int qdio_get_next_buffers(struct ccw_device *, int, int *, int *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) extern int qdio_inspect_queue(struct ccw_device *cdev, unsigned int nr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 			      bool is_input, unsigned int *bufnr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 			      unsigned int *error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) extern int qdio_shutdown(struct ccw_device *, int);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) extern int qdio_free(struct ccw_device *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) extern int qdio_get_ssqd_desc(struct ccw_device *, struct qdio_ssqd_desc *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) #endif /* __QDIO_H__ */