^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * S390 version
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright IBM Corp. 1999, 2000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #ifndef _S390_PTRACE_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #define _S390_PTRACE_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/bits.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <uapi/asm/ptrace.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define PIF_SYSCALL 0 /* inside a system call */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define PIF_PER_TRAP 1 /* deliver sigtrap on return to user */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define PIF_SYSCALL_RESTART 2 /* restart the current system call */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define PIF_GUEST_FAULT 3 /* indicates program check in sie64a */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define _PIF_SYSCALL BIT(PIF_SYSCALL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define _PIF_PER_TRAP BIT(PIF_PER_TRAP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define _PIF_SYSCALL_RESTART BIT(PIF_SYSCALL_RESTART)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define _PIF_GUEST_FAULT BIT(PIF_GUEST_FAULT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #ifndef __ASSEMBLY__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define PSW_KERNEL_BITS (PSW_DEFAULT_KEY | PSW_MASK_BASE | PSW_ASC_HOME | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) PSW_MASK_EA | PSW_MASK_BA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define PSW_USER_BITS (PSW_MASK_DAT | PSW_MASK_IO | PSW_MASK_EXT | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) PSW_DEFAULT_KEY | PSW_MASK_BASE | PSW_MASK_MCHECK | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) PSW_MASK_PSTATE | PSW_ASC_PRIMARY)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) struct psw_bits {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) unsigned long : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) unsigned long per : 1; /* PER-Mask */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) unsigned long : 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) unsigned long dat : 1; /* DAT Mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) unsigned long io : 1; /* Input/Output Mask */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) unsigned long ext : 1; /* External Mask */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) unsigned long key : 4; /* PSW Key */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) unsigned long : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) unsigned long mcheck : 1; /* Machine-Check Mask */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) unsigned long wait : 1; /* Wait State */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) unsigned long pstate : 1; /* Problem State */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) unsigned long as : 2; /* Address Space Control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) unsigned long cc : 2; /* Condition Code */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) unsigned long pm : 4; /* Program Mask */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) unsigned long ri : 1; /* Runtime Instrumentation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) unsigned long : 6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) unsigned long eaba : 2; /* Addressing Mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) unsigned long : 31;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) unsigned long ia : 64; /* Instruction Address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) PSW_BITS_AMODE_24BIT = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) PSW_BITS_AMODE_31BIT = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) PSW_BITS_AMODE_64BIT = 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) PSW_BITS_AS_PRIMARY = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) PSW_BITS_AS_ACCREG = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) PSW_BITS_AS_SECONDARY = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) PSW_BITS_AS_HOME = 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define psw_bits(__psw) (*({ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) typecheck(psw_t, __psw); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) &(*(struct psw_bits *)(&(__psw))); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) }))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) * The pt_regs struct defines the way the registers are stored on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) * the stack during a system call.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) struct pt_regs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) user_pt_regs user_regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) unsigned long args[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) psw_t psw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) unsigned long gprs[NUM_GPRS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) unsigned long orig_gpr2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) unsigned int int_code;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) unsigned int int_parm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) unsigned long int_parm_long;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) * Program event recording (PER) register set.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) struct per_regs {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) unsigned long control; /* PER control bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) unsigned long start; /* PER starting address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) unsigned long end; /* PER ending address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) * PER event contains information about the cause of the last PER exception.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) struct per_event {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) unsigned short cause; /* PER code, ATMID and AI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) unsigned long address; /* PER address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) unsigned char paid; /* PER access identification */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) * Simplified per_info structure used to decode the ptrace user space ABI.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) struct per_struct_kernel {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) unsigned long cr9; /* PER control bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) unsigned long cr10; /* PER starting address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) unsigned long cr11; /* PER ending address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) unsigned long bits; /* Obsolete software bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) unsigned long starting_addr; /* User specified start address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) unsigned long ending_addr; /* User specified end address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) unsigned short perc_atmid; /* PER trap ATMID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) unsigned long address; /* PER trap instruction address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) unsigned char access_id; /* PER trap access identification */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) #define PER_EVENT_MASK 0xEB000000UL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) #define PER_EVENT_BRANCH 0x80000000UL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) #define PER_EVENT_IFETCH 0x40000000UL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) #define PER_EVENT_STORE 0x20000000UL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) #define PER_EVENT_STORE_REAL 0x08000000UL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) #define PER_EVENT_TRANSACTION_END 0x02000000UL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) #define PER_EVENT_NULLIFICATION 0x01000000UL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) #define PER_CONTROL_MASK 0x00e00000UL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) #define PER_CONTROL_BRANCH_ADDRESS 0x00800000UL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) #define PER_CONTROL_SUSPENSION 0x00400000UL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) #define PER_CONTROL_ALTERATION 0x00200000UL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) static inline void set_pt_regs_flag(struct pt_regs *regs, int flag)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) regs->flags |= (1UL << flag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) static inline void clear_pt_regs_flag(struct pt_regs *regs, int flag)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) regs->flags &= ~(1UL << flag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) static inline int test_pt_regs_flag(struct pt_regs *regs, int flag)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) return !!(regs->flags & (1UL << flag));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) * These are defined as per linux/ptrace.h, which see.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) #define arch_has_single_step() (1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) #define arch_has_block_step() (1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) #define user_mode(regs) (((regs)->psw.mask & PSW_MASK_PSTATE) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) #define instruction_pointer(regs) ((regs)->psw.addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) #define user_stack_pointer(regs)((regs)->gprs[15])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) #define profile_pc(regs) instruction_pointer(regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) static inline long regs_return_value(struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) return regs->gprs[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) static inline void instruction_pointer_set(struct pt_regs *regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) unsigned long val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) regs->psw.addr = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) int regs_query_register_offset(const char *name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) const char *regs_query_register_name(unsigned int offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) unsigned long regs_get_register(struct pt_regs *regs, unsigned int offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, unsigned int n);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) return regs->gprs[15];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) static inline void regs_set_return_value(struct pt_regs *regs, unsigned long rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) regs->gprs[2] = rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) #endif /* __ASSEMBLY__ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) #endif /* _S390_PTRACE_H */