Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) #ifndef _ASM_S390_NOSPEC_ASM_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) #define _ASM_S390_NOSPEC_ASM_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) #include <asm/alternative-asm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) #include <asm/asm-offsets.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) #include <asm/dwarf.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #ifdef __ASSEMBLY__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #ifdef CC_USING_EXPOLINE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) _LC_BR_R1 = __LC_BR_R1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16)  * The expoline macros are used to create thunks in the same format
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17)  * as gcc generates them. The 'comdat' section flag makes sure that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18)  * the various thunks are merged into a single copy.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 	.macro __THUNK_PROLOG_NAME name
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 	.pushsection .text.\name,"axG",@progbits,\name,comdat
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 	.globl \name
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 	.hidden \name
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 	.type \name,@function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) \name:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 	CFI_STARTPROC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 	.endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 	.macro __THUNK_EPILOG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	CFI_ENDPROC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	.popsection
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 	.endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	.macro __THUNK_PROLOG_BR r1,r2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	__THUNK_PROLOG_NAME __s390_indirect_jump_r\r2\()use_r\r1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	.endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	.macro __THUNK_PROLOG_BC d0,r1,r2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	__THUNK_PROLOG_NAME __s390_indirect_branch_\d0\()_\r2\()use_\r1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	.endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	.macro __THUNK_BR r1,r2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	jg	__s390_indirect_jump_r\r2\()use_r\r1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	.endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	.macro __THUNK_BC d0,r1,r2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	jg	__s390_indirect_branch_\d0\()_\r2\()use_\r1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	.endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	.macro __THUNK_BRASL r1,r2,r3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	brasl	\r1,__s390_indirect_jump_r\r3\()use_r\r2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	.endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	.macro	__DECODE_RR expand,reg,ruse
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	.set __decode_fail,1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	.irp r1,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	.ifc \reg,%r\r1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	.irp r2,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	.ifc \ruse,%r\r2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	\expand \r1,\r2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	.set __decode_fail,0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	.endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	.endr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	.endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	.endr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	.if __decode_fail == 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	.error "__DECODE_RR failed"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	.endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	.endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	.macro	__DECODE_RRR expand,rsave,rtarget,ruse
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	.set __decode_fail,1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	.irp r1,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	.ifc \rsave,%r\r1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	.irp r2,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	.ifc \rtarget,%r\r2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	.irp r3,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	.ifc \ruse,%r\r3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	\expand \r1,\r2,\r3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	.set __decode_fail,0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	.endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	.endr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	.endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	.endr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	.endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	.endr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	.if __decode_fail == 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	.error "__DECODE_RRR failed"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	.endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	.endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	.macro	__DECODE_DRR expand,disp,reg,ruse
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	.set __decode_fail,1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	.irp r1,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	.ifc \reg,%r\r1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	.irp r2,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	.ifc \ruse,%r\r2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	\expand \disp,\r1,\r2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	.set __decode_fail,0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	.endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	.endr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	.endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	.endr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	.if __decode_fail == 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	.error "__DECODE_DRR failed"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	.endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	.endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	.macro __THUNK_EX_BR reg,ruse
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	# Be very careful when adding instructions to this macro!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	# The ALTERNATIVE replacement code has a .+10 which targets
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	# the "br \reg" after the code has been patched.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #ifdef CONFIG_HAVE_MARCH_Z10_FEATURES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	exrl	0,555f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	j	.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	.ifc \reg,%r1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	ALTERNATIVE "ex %r0,_LC_BR_R1", ".insn ril,0xc60000000000,0,.+10", 35
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	j	.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	.else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	larl	\ruse,555f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	ex	0,0(\ruse)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	j	.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	.endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 555:	br	\reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	.endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	.macro __THUNK_EX_BC disp,reg,ruse
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) #ifdef CONFIG_HAVE_MARCH_Z10_FEATURES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	exrl	0,556f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	j	.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	larl	\ruse,556f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	ex	0,0(\ruse)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	j	.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 556:	b	\disp(\reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	.endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	.macro GEN_BR_THUNK reg,ruse=%r1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	__DECODE_RR __THUNK_PROLOG_BR,\reg,\ruse
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	__THUNK_EX_BR \reg,\ruse
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	__THUNK_EPILOG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	.endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	.macro GEN_B_THUNK disp,reg,ruse=%r1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	__DECODE_DRR __THUNK_PROLOG_BC,\disp,\reg,\ruse
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	__THUNK_EX_BC \disp,\reg,\ruse
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	__THUNK_EPILOG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	.endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	.macro BR_EX reg,ruse=%r1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 557:	__DECODE_RR __THUNK_BR,\reg,\ruse
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	.pushsection .s390_indirect_branches,"a",@progbits
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	.long	557b-.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	.popsection
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	.endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	 .macro B_EX disp,reg,ruse=%r1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 558:	__DECODE_DRR __THUNK_BC,\disp,\reg,\ruse
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	.pushsection .s390_indirect_branches,"a",@progbits
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	.long	558b-.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	.popsection
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	.endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	.macro BASR_EX rsave,rtarget,ruse=%r1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 559:	__DECODE_RRR __THUNK_BRASL,\rsave,\rtarget,\ruse
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	.pushsection .s390_indirect_branches,"a",@progbits
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	.long	559b-.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	.popsection
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	.endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	.macro GEN_BR_THUNK reg,ruse=%r1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	.endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	.macro GEN_B_THUNK disp,reg,ruse=%r1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	.endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	 .macro BR_EX reg,ruse=%r1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	br	\reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	.endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	 .macro B_EX disp,reg,ruse=%r1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	b	\disp(\reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	.endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	.macro BASR_EX rsave,rtarget,ruse=%r1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	basr	\rsave,\rtarget
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	.endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) #endif /* CC_USING_EXPOLINE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) #endif /* __ASSEMBLY__ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) #endif /* _ASM_S390_NOSPEC_ASM_H */