^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) #ifndef _ASM_IRQ_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #define _ASM_IRQ_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) #define EXT_INTERRUPT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #define IO_INTERRUPT 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #define THIN_INTERRUPT 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #define NR_IRQS_BASE 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define NR_IRQS NR_IRQS_BASE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define NR_IRQS_LEGACY NR_IRQS_BASE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) /* External interruption codes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define EXT_IRQ_INTERRUPT_KEY 0x0040
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define EXT_IRQ_CLK_COMP 0x1004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define EXT_IRQ_CPU_TIMER 0x1005
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define EXT_IRQ_WARNING_TRACK 0x1007
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define EXT_IRQ_MALFUNC_ALERT 0x1200
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define EXT_IRQ_EMERGENCY_SIG 0x1201
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define EXT_IRQ_EXTERNAL_CALL 0x1202
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define EXT_IRQ_TIMING_ALERT 0x1406
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define EXT_IRQ_MEASURE_ALERT 0x1407
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define EXT_IRQ_SERVICE_SIG 0x2401
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define EXT_IRQ_CP_SERVICE 0x2603
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define EXT_IRQ_IUCV 0x4000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #ifndef __ASSEMBLY__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/hardirq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <linux/percpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <linux/cache.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) enum interruption_class {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) IRQEXT_CLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) IRQEXT_EXC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) IRQEXT_EMS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) IRQEXT_TMR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) IRQEXT_TLA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) IRQEXT_PFL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) IRQEXT_DSD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) IRQEXT_VRT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) IRQEXT_SCP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) IRQEXT_IUC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) IRQEXT_CMS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) IRQEXT_CMC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) IRQEXT_FTP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) IRQIO_CIO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) IRQIO_DAS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) IRQIO_C15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) IRQIO_C70,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) IRQIO_TAP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) IRQIO_VMR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) IRQIO_LCS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) IRQIO_CTC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) IRQIO_ADM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) IRQIO_CSC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) IRQIO_VIR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) IRQIO_QAI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) IRQIO_APB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) IRQIO_PCF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) IRQIO_PCD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) IRQIO_MSI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) IRQIO_VAI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) IRQIO_GAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) NMI_NMI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) CPU_RST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) NR_ARCH_IRQS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) struct irq_stat {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) unsigned int irqs[NR_ARCH_IRQS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) DECLARE_PER_CPU_SHARED_ALIGNED(struct irq_stat, irq_stat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) static __always_inline void inc_irq_stat(enum interruption_class irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) __this_cpu_inc(irq_stat.irqs[irq]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) struct ext_code {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) unsigned short subcode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) unsigned short code;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) typedef void (*ext_int_handler_t)(struct ext_code, unsigned int, unsigned long);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) int register_external_irq(u16 code, ext_int_handler_t handler);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) int unregister_external_irq(u16 code, ext_int_handler_t handler);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) enum irq_subclass {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) IRQ_SUBCLASS_MEASUREMENT_ALERT = 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) IRQ_SUBCLASS_SERVICE_SIGNAL = 9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define CR0_IRQ_SUBCLASS_MASK \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) ((1UL << (63 - 30)) /* Warning Track */ | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) (1UL << (63 - 48)) /* Malfunction Alert */ | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) (1UL << (63 - 49)) /* Emergency Signal */ | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) (1UL << (63 - 50)) /* External Call */ | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) (1UL << (63 - 52)) /* Clock Comparator */ | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) (1UL << (63 - 53)) /* CPU Timer */ | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) (1UL << (63 - 54)) /* Service Signal */ | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) (1UL << (63 - 57)) /* Interrupt Key */ | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) (1UL << (63 - 58)) /* Measurement Alert */ | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) (1UL << (63 - 59)) /* Timing Alert */ | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) (1UL << (63 - 62))) /* IUCV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) void irq_subclass_register(enum irq_subclass subclass);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) void irq_subclass_unregister(enum irq_subclass subclass);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define irq_canonicalize(irq) (irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #endif /* __ASSEMBLY__ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) #endif /* _ASM_IRQ_H */