^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Functions for assembling fcx enabled I/O control blocks.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright IBM Corp. 2008
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Author(s): Peter Oberparleiter <peter.oberparleiter@de.ibm.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #ifndef _ASM_S390_FCX_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define _ASM_S390_FCX_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define TCW_FORMAT_DEFAULT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define TCW_TIDAW_FORMAT_DEFAULT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define TCW_FLAGS_INPUT_TIDA (1 << (23 - 5))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define TCW_FLAGS_TCCB_TIDA (1 << (23 - 6))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define TCW_FLAGS_OUTPUT_TIDA (1 << (23 - 7))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define TCW_FLAGS_TIDAW_FORMAT(x) ((x) & 3) << (23 - 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define TCW_FLAGS_GET_TIDAW_FORMAT(x) (((x) >> (23 - 9)) & 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * struct tcw - Transport Control Word (TCW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * @format: TCW format
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * @flags: TCW flags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * @tccbl: Transport-Command-Control-Block Length
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * @r: Read Operations
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * @w: Write Operations
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * @output: Output-Data Address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * @input: Input-Data Address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * @tsb: Transport-Status-Block Address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * @tccb: Transport-Command-Control-Block Address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * @output_count: Output Count
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * @input_count: Input Count
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * @intrg: Interrogate TCW Address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) struct tcw {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) u32 format:2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) u32 :6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) u32 flags:24;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) u32 :8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) u32 tccbl:6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) u32 r:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) u32 w:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) u32 :16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) u64 output;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) u64 input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) u64 tsb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) u64 tccb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) u32 output_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) u32 input_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) u32 :32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) u32 :32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) u32 :32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) u32 intrg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) } __attribute__ ((packed, aligned(64)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define TIDAW_FLAGS_LAST (1 << (7 - 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define TIDAW_FLAGS_SKIP (1 << (7 - 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define TIDAW_FLAGS_DATA_INT (1 << (7 - 2))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define TIDAW_FLAGS_TTIC (1 << (7 - 3))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define TIDAW_FLAGS_INSERT_CBC (1 << (7 - 4))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) * struct tidaw - Transport-Indirect-Addressing Word (TIDAW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) * @flags: TIDAW flags. Can be an arithmetic OR of the following constants:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) * %TIDAW_FLAGS_LAST, %TIDAW_FLAGS_SKIP, %TIDAW_FLAGS_DATA_INT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) * %TIDAW_FLAGS_TTIC, %TIDAW_FLAGS_INSERT_CBC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) * @count: Count
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) * @addr: Address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) struct tidaw {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) u32 flags:8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) u32 :24;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) u32 count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) u64 addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) } __attribute__ ((packed, aligned(16)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) * struct tsa_iostat - I/O-Status Transport-Status Area (IO-Stat TSA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) * @dev_time: Device Time
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) * @def_time: Defer Time
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) * @queue_time: Queue Time
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) * @dev_busy_time: Device-Busy Time
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) * @dev_act_time: Device-Active-Only Time
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) * @sense: Sense Data (if present)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) struct tsa_iostat {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) u32 dev_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) u32 def_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) u32 queue_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) u32 dev_busy_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) u32 dev_act_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) u8 sense[32];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) } __attribute__ ((packed));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) * struct tsa_ddpcs - Device-Detected-Program-Check Transport-Status Area (DDPC TSA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) * @rc: Reason Code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) * @rcq: Reason Code Qualifier
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) * @sense: Sense Data (if present)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) struct tsa_ddpc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) u32 :24;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) u32 rc:8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) u8 rcq[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) u8 sense[32];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) } __attribute__ ((packed));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) #define TSA_INTRG_FLAGS_CU_STATE_VALID (1 << (7 - 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #define TSA_INTRG_FLAGS_DEV_STATE_VALID (1 << (7 - 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #define TSA_INTRG_FLAGS_OP_STATE_VALID (1 << (7 - 2))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) * struct tsa_intrg - Interrogate Transport-Status Area (Intrg. TSA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) * @format: Format
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) * @flags: Flags. Can be an arithmetic OR of the following constants:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) * %TSA_INTRG_FLAGS_CU_STATE_VALID, %TSA_INTRG_FLAGS_DEV_STATE_VALID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) * %TSA_INTRG_FLAGS_OP_STATE_VALID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) * @cu_state: Controle-Unit State
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) * @dev_state: Device State
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) * @op_state: Operation State
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) * @sd_info: State-Dependent Information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) * @dl_id: Device-Level Identifier
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) * @dd_data: Device-Dependent Data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) struct tsa_intrg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) u32 format:8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) u32 flags:8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) u32 cu_state:8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) u32 dev_state:8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) u32 op_state:8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) u32 :24;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) u8 sd_info[12];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) u32 dl_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) u8 dd_data[28];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) } __attribute__ ((packed));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) #define TSB_FORMAT_NONE 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) #define TSB_FORMAT_IOSTAT 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) #define TSB_FORMAT_DDPC 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) #define TSB_FORMAT_INTRG 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) #define TSB_FLAGS_DCW_OFFSET_VALID (1 << (7 - 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) #define TSB_FLAGS_COUNT_VALID (1 << (7 - 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) #define TSB_FLAGS_CACHE_MISS (1 << (7 - 2))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) #define TSB_FLAGS_TIME_VALID (1 << (7 - 3))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) #define TSB_FLAGS_FORMAT(x) ((x) & 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) #define TSB_FORMAT(t) ((t)->flags & 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) * struct tsb - Transport-Status Block (TSB)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) * @length: Length
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) * @flags: Flags. Can be an arithmetic OR of the following constants:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) * %TSB_FLAGS_DCW_OFFSET_VALID, %TSB_FLAGS_COUNT_VALID, %TSB_FLAGS_CACHE_MISS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) * %TSB_FLAGS_TIME_VALID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) * @dcw_offset: DCW Offset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) * @count: Count
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) * @tsa: Transport-Status-Area
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) struct tsb {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) u32 length:8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) u32 flags:8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) u32 dcw_offset:16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) u32 count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) u32 :32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) struct tsa_iostat iostat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) struct tsa_ddpc ddpc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) struct tsa_intrg intrg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) } __attribute__ ((packed)) tsa;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) } __attribute__ ((packed, aligned(8)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) #define DCW_INTRG_FORMAT_DEFAULT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) #define DCW_INTRG_RC_UNSPECIFIED 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) #define DCW_INTRG_RC_TIMEOUT 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) #define DCW_INTRG_RCQ_UNSPECIFIED 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) #define DCW_INTRG_RCQ_PRIMARY 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) #define DCW_INTRG_RCQ_SECONDARY 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) #define DCW_INTRG_FLAGS_MPM (1 << (7 - 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) #define DCW_INTRG_FLAGS_PPR (1 << (7 - 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) #define DCW_INTRG_FLAGS_CRIT (1 << (7 - 2))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) * struct dcw_intrg_data - Interrogate DCW data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) * @format: Format. Should be %DCW_INTRG_FORMAT_DEFAULT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) * @rc: Reason Code. Can be one of %DCW_INTRG_RC_UNSPECIFIED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) * %DCW_INTRG_RC_TIMEOUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) * @rcq: Reason Code Qualifier: Can be one of %DCW_INTRG_RCQ_UNSPECIFIED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) * %DCW_INTRG_RCQ_PRIMARY, %DCW_INTRG_RCQ_SECONDARY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) * @lpm: Logical-Path Mask
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) * @pam: Path-Available Mask
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) * @pim: Path-Installed Mask
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) * @timeout: Timeout
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) * @flags: Flags. Can be an arithmetic OR of %DCW_INTRG_FLAGS_MPM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) * %DCW_INTRG_FLAGS_PPR, %DCW_INTRG_FLAGS_CRIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) * @time: Time
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) * @prog_id: Program Identifier
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) * @prog_data: Program-Dependent Data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) struct dcw_intrg_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) u32 format:8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) u32 rc:8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) u32 rcq:8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) u32 lpm:8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) u32 pam:8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) u32 pim:8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) u32 timeout:16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) u32 flags:8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) u32 :24;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) u32 :32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) u64 time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) u64 prog_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) u8 prog_data[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) } __attribute__ ((packed));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) #define DCW_FLAGS_CC (1 << (7 - 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) #define DCW_CMD_WRITE 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) #define DCW_CMD_READ 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) #define DCW_CMD_CONTROL 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) #define DCW_CMD_SENSE 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) #define DCW_CMD_SENSE_ID 0xe4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) #define DCW_CMD_INTRG 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) * struct dcw - Device-Command Word (DCW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) * @cmd: Command Code. Can be one of %DCW_CMD_WRITE, %DCW_CMD_READ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) * %DCW_CMD_CONTROL, %DCW_CMD_SENSE, %DCW_CMD_SENSE_ID, %DCW_CMD_INTRG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) * @flags: Flags. Can be an arithmetic OR of %DCW_FLAGS_CC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) * @cd_count: Control-Data Count
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) * @count: Count
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) * @cd: Control Data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) struct dcw {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) u32 cmd:8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) u32 flags:8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) u32 :8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) u32 cd_count:8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) u32 count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) u8 cd[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) } __attribute__ ((packed));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) #define TCCB_FORMAT_DEFAULT 0x7f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) #define TCCB_MAX_DCW 30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) #define TCCB_MAX_SIZE (sizeof(struct tccb_tcah) + \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) TCCB_MAX_DCW * sizeof(struct dcw) + \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) sizeof(struct tccb_tcat))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) #define TCCB_SAC_DEFAULT 0x1ffe
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) #define TCCB_SAC_INTRG 0x1fff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) * struct tccb_tcah - Transport-Command-Area Header (TCAH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) * @format: Format. Should be %TCCB_FORMAT_DEFAULT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) * @tcal: Transport-Command-Area Length
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) * @sac: Service-Action Code. Can be one of %TCCB_SAC_DEFAULT, %TCCB_SAC_INTRG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) * @prio: Priority
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) struct tccb_tcah {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) u32 format:8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) u32 :24;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) u32 :24;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) u32 tcal:8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) u32 sac:16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) u32 :8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) u32 prio:8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) u32 :32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) } __attribute__ ((packed));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) * struct tccb_tcat - Transport-Command-Area Trailer (TCAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) * @count: Transport Count
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) struct tccb_tcat {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) u32 :32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) u32 count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) } __attribute__ ((packed));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) * struct tccb - (partial) Transport-Command-Control Block (TCCB)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) * @tcah: TCAH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) * @tca: Transport-Command Area
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) struct tccb {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) struct tccb_tcah tcah;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) u8 tca[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) } __attribute__ ((packed, aligned(8)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) struct tcw *tcw_get_intrg(struct tcw *tcw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) void *tcw_get_data(struct tcw *tcw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) struct tccb *tcw_get_tccb(struct tcw *tcw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) struct tsb *tcw_get_tsb(struct tcw *tcw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) void tcw_init(struct tcw *tcw, int r, int w);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) void tcw_finalize(struct tcw *tcw, int num_tidaws);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) void tcw_set_intrg(struct tcw *tcw, struct tcw *intrg_tcw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) void tcw_set_data(struct tcw *tcw, void *data, int use_tidal);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) void tcw_set_tccb(struct tcw *tcw, struct tccb *tccb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) void tcw_set_tsb(struct tcw *tcw, struct tsb *tsb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) void tccb_init(struct tccb *tccb, size_t tccb_size, u32 sac);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) void tsb_init(struct tsb *tsb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) struct dcw *tccb_add_dcw(struct tccb *tccb, size_t tccb_size, u8 cmd, u8 flags,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) void *cd, u8 cd_count, u32 count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) struct tidaw *tcw_add_tidaw(struct tcw *tcw, int num_tidaws, u8 flags,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) void *addr, u32 count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) #endif /* _ASM_S390_FCX_H */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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