^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright IBM Corp. 2002, 2007
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Author(s): Ingo Adlung <adlung@de.ibm.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Cornelia Huck <cornelia.huck@de.ibm.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Arnd Bergmann <arndb@de.ibm.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Peter Oberparleiter <peter.oberparleiter@de.ibm.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #ifndef _ASM_S390_AIRQ_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define _ASM_S390_AIRQ_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/bit_spinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/dma-mapping.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) struct airq_struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) struct hlist_node list; /* Handler queueing. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) void (*handler)(struct airq_struct *airq, bool floating);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) u8 *lsi_ptr; /* Local-Summary-Indicator pointer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) u8 lsi_mask; /* Local-Summary-Indicator mask */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) u8 isc; /* Interrupt-subclass */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) u8 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define AIRQ_PTR_ALLOCATED 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) int register_adapter_interrupt(struct airq_struct *airq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) void unregister_adapter_interrupt(struct airq_struct *airq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) /* Adapter interrupt bit vector */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) struct airq_iv {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) unsigned long *vector; /* Adapter interrupt bit vector */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) dma_addr_t vector_dma; /* Adapter interrupt bit vector dma */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) unsigned long *avail; /* Allocation bit mask for the bit vector */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) unsigned long *bitlock; /* Lock bit mask for the bit vector */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) unsigned long *ptr; /* Pointer associated with each bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) unsigned int *data; /* 32 bit value associated with each bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) unsigned long bits; /* Number of bits in the vector */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) unsigned long end; /* Number of highest allocated bit + 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) unsigned long flags; /* Allocation flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) spinlock_t lock; /* Lock to protect alloc & free */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define AIRQ_IV_ALLOC 1 /* Use an allocation bit mask */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define AIRQ_IV_BITLOCK 2 /* Allocate the lock bit mask */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define AIRQ_IV_PTR 4 /* Allocate the ptr array */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define AIRQ_IV_DATA 8 /* Allocate the data array */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define AIRQ_IV_CACHELINE 16 /* Cacheline alignment for the vector */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) struct airq_iv *airq_iv_create(unsigned long bits, unsigned long flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) void airq_iv_release(struct airq_iv *iv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) unsigned long airq_iv_alloc(struct airq_iv *iv, unsigned long num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) void airq_iv_free(struct airq_iv *iv, unsigned long bit, unsigned long num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) unsigned long airq_iv_scan(struct airq_iv *iv, unsigned long start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) unsigned long end);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) static inline unsigned long airq_iv_alloc_bit(struct airq_iv *iv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) return airq_iv_alloc(iv, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) static inline void airq_iv_free_bit(struct airq_iv *iv, unsigned long bit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) airq_iv_free(iv, bit, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) static inline unsigned long airq_iv_end(struct airq_iv *iv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) return iv->end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) static inline void airq_iv_lock(struct airq_iv *iv, unsigned long bit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) const unsigned long be_to_le = BITS_PER_LONG - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) bit_spin_lock(bit ^ be_to_le, iv->bitlock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) static inline void airq_iv_unlock(struct airq_iv *iv, unsigned long bit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) const unsigned long be_to_le = BITS_PER_LONG - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) bit_spin_unlock(bit ^ be_to_le, iv->bitlock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) static inline void airq_iv_set_data(struct airq_iv *iv, unsigned long bit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) unsigned int data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) iv->data[bit] = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) static inline unsigned int airq_iv_get_data(struct airq_iv *iv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) unsigned long bit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) return iv->data[bit];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) static inline void airq_iv_set_ptr(struct airq_iv *iv, unsigned long bit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) unsigned long ptr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) iv->ptr[bit] = ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) static inline unsigned long airq_iv_get_ptr(struct airq_iv *iv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) unsigned long bit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) return iv->ptr[bit];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #endif /* _ASM_S390_AIRQ_H */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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