Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Hardware-accelerated CRC-32 variants for Linux on z Systems
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Use the z/Architecture Vector Extension Facility to accelerate the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * computing of CRC-32 checksums.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * This CRC-32 implementation algorithm processes the most-significant
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * bit first (BE).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  * Copyright IBM Corp. 2015
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  * Author(s): Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/linkage.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <asm/nospec-insn.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <asm/vx-insn.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) /* Vector register range containing CRC-32 constants */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #define CONST_R1R2		%v9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #define CONST_R3R4		%v10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #define CONST_R5		%v11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #define CONST_R6		%v12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #define CONST_RU_POLY		%v13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define CONST_CRC_POLY		%v14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) .data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) .align 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31)  * The CRC-32 constant block contains reduction constants to fold and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32)  * process particular chunks of the input data stream in parallel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34)  * For the CRC-32 variants, the constants are precomputed according to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35)  * these defintions:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37)  *	R1 = x4*128+64 mod P(x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38)  *	R2 = x4*128    mod P(x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39)  *	R3 = x128+64   mod P(x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40)  *	R4 = x128      mod P(x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41)  *	R5 = x96       mod P(x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42)  *	R6 = x64       mod P(x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44)  *	Barret reduction constant, u, is defined as floor(x**64 / P(x)).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46)  *	where P(x) is the polynomial in the normal domain and the P'(x) is the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47)  *	polynomial in the reversed (bitreflected) domain.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49)  * Note that the constant definitions below are extended in order to compute
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50)  * intermediate results with a single VECTOR GALOIS FIELD MULTIPLY instruction.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51)  * The righmost doubleword can be 0 to prevent contribution to the result or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52)  * can be multiplied by 1 to perform an XOR without the need for a separate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53)  * VECTOR EXCLUSIVE OR instruction.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55)  * CRC-32 (IEEE 802.3 Ethernet, ...) polynomials:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57)  *	P(x)  = 0x04C11DB7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58)  *	P'(x) = 0xEDB88320
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) .Lconstants_CRC_32_BE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	.quad		0x08833794c, 0x0e6228b11	# R1, R2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	.quad		0x0c5b9cd4c, 0x0e8a45605	# R3, R4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	.quad		0x0f200aa66, 1 << 32		# R5, x32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	.quad		0x0490d678d, 1			# R6, 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	.quad		0x104d101df, 0			# u
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	.quad		0x104C11DB7, 0			# P(x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) .previous
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	GEN_BR_THUNK %r14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) .text
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75)  * The CRC-32 function(s) use these calling conventions:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77)  * Parameters:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79)  *	%r2:	Initial CRC value, typically ~0; and final CRC (return) value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80)  *	%r3:	Input buffer pointer, performance might be improved if the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81)  *		buffer is on a doubleword boundary.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82)  *	%r4:	Length of the buffer, must be 64 bytes or greater.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84)  * Register usage:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86)  *	%r5:	CRC-32 constant pool base pointer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87)  *	V0:	Initial CRC value and intermediate constants and results.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88)  *	V1..V4:	Data for CRC computation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89)  *	V5..V8:	Next data chunks that are fetched from the input buffer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91)  *	V9..V14: CRC-32 constants.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) ENTRY(crc32_be_vgfm_16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	/* Load CRC-32 constants */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	larl	%r5,.Lconstants_CRC_32_BE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	VLM	CONST_R1R2,CONST_CRC_POLY,0,%r5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	/* Load the initial CRC value into the leftmost word of V0. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	VZERO	%v0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	VLVGF	%v0,%r2,0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	/* Load a 64-byte data chunk and XOR with CRC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	VLM	%v1,%v4,0,%r3		/* 64-bytes into V1..V4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	VX	%v1,%v0,%v1		/* V1 ^= CRC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	aghi	%r3,64			/* BUF = BUF + 64 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	aghi	%r4,-64			/* LEN = LEN - 64 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	/* Check remaining buffer size and jump to proper folding method */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	cghi	%r4,64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	jl	.Lless_than_64bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) .Lfold_64bytes_loop:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	/* Load the next 64-byte data chunk into V5 to V8 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	VLM	%v5,%v8,0,%r3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	 * Perform a GF(2) multiplication of the doublewords in V1 with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	 * the reduction constants in V0.  The intermediate result is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	 * then folded (accumulated) with the next data chunk in V5 and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	 * stored in V1.  Repeat this step for the register contents
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	 * in V2, V3, and V4 respectively.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	VGFMAG	%v1,CONST_R1R2,%v1,%v5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	VGFMAG	%v2,CONST_R1R2,%v2,%v6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	VGFMAG	%v3,CONST_R1R2,%v3,%v7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	VGFMAG	%v4,CONST_R1R2,%v4,%v8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	/* Adjust buffer pointer and length for next loop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	aghi	%r3,64			/* BUF = BUF + 64 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	aghi	%r4,-64			/* LEN = LEN - 64 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	cghi	%r4,64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	jnl	.Lfold_64bytes_loop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) .Lless_than_64bytes:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	/* Fold V1 to V4 into a single 128-bit value in V1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	VGFMAG	%v1,CONST_R3R4,%v1,%v2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	VGFMAG	%v1,CONST_R3R4,%v1,%v3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	VGFMAG	%v1,CONST_R3R4,%v1,%v4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	/* Check whether to continue with 64-bit folding */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	cghi	%r4,16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	jl	.Lfinal_fold
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) .Lfold_16bytes_loop:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	VL	%v2,0,,%r3		/* Load next data chunk */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	VGFMAG	%v1,CONST_R3R4,%v1,%v2	/* Fold next data chunk */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	/* Adjust buffer pointer and size for folding next data chunk */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	aghi	%r3,16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	aghi	%r4,-16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	/* Process remaining data chunks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	cghi	%r4,16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	jnl	.Lfold_16bytes_loop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) .Lfinal_fold:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	 * The R5 constant is used to fold a 128-bit value into an 96-bit value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	 * that is XORed with the next 96-bit input data chunk.  To use a single
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	 * VGFMG instruction, multiply the rightmost 64-bit with x^32 (1<<32) to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	 * form an intermediate 96-bit value (with appended zeros) which is then
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	 * XORed with the intermediate reduction result.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	VGFMG	%v1,CONST_R5,%v1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	 * Further reduce the remaining 96-bit value to a 64-bit value using a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	 * single VGFMG, the rightmost doubleword is multiplied with 0x1. The
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	 * intermediate result is then XORed with the product of the leftmost
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	 * doubleword with R6.	The result is a 64-bit value and is subject to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	 * the Barret reduction.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	VGFMG	%v1,CONST_R6,%v1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	 * The input values to the Barret reduction are the degree-63 polynomial
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	 * in V1 (R(x)), degree-32 generator polynomial, and the reduction
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	 * constant u.	The Barret reduction result is the CRC value of R(x) mod
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	 * P(x).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	 * The Barret reduction algorithm is defined as:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	 *    1. T1(x) = floor( R(x) / x^32 ) GF2MUL u
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	 *    2. T2(x) = floor( T1(x) / x^32 ) GF2MUL P(x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	 *    3. C(x)  = R(x) XOR T2(x) mod x^32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	 * Note: To compensate the division by x^32, use the vector unpack
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	 * instruction to move the leftmost word into the leftmost doubleword
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	 * of the vector register.  The rightmost doubleword is multiplied
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	 * with zero to not contribute to the intermedate results.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	/* T1(x) = floor( R(x) / x^32 ) GF2MUL u */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	VUPLLF	%v2,%v1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	VGFMG	%v2,CONST_RU_POLY,%v2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	 * Compute the GF(2) product of the CRC polynomial in VO with T1(x) in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	 * V2 and XOR the intermediate result, T2(x),  with the value in V1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	 * The final result is in the rightmost word of V2.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	VUPLLF	%v2,%v2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	VGFMAG	%v2,CONST_CRC_POLY,%v2,%v1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) .Ldone:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	VLGVF	%r2,%v2,3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	BR_EX	%r14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) ENDPROC(crc32_be_vgfm_16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) .previous