^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * SBI initialilization and all extension implementation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 2020 Western Digital Corporation or its affiliates.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/pm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <asm/sbi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <asm/smp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) /* default SBI version is 0.1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) unsigned long sbi_spec_version = SBI_SPEC_VERSION_DEFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) EXPORT_SYMBOL(sbi_spec_version);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) static void (*__sbi_set_timer)(uint64_t stime);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) static int (*__sbi_send_ipi)(const unsigned long *hart_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) static int (*__sbi_rfence)(int fid, const unsigned long *hart_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) unsigned long start, unsigned long size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) unsigned long arg4, unsigned long arg5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) unsigned long arg1, unsigned long arg2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) unsigned long arg3, unsigned long arg4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) unsigned long arg5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) struct sbiret ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) register uintptr_t a0 asm ("a0") = (uintptr_t)(arg0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) register uintptr_t a1 asm ("a1") = (uintptr_t)(arg1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) register uintptr_t a2 asm ("a2") = (uintptr_t)(arg2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) register uintptr_t a3 asm ("a3") = (uintptr_t)(arg3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) register uintptr_t a4 asm ("a4") = (uintptr_t)(arg4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) register uintptr_t a5 asm ("a5") = (uintptr_t)(arg5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) register uintptr_t a6 asm ("a6") = (uintptr_t)(fid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) register uintptr_t a7 asm ("a7") = (uintptr_t)(ext);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) asm volatile ("ecall"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) : "+r" (a0), "+r" (a1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) : "r" (a2), "r" (a3), "r" (a4), "r" (a5), "r" (a6), "r" (a7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) : "memory");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) ret.error = a0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) ret.value = a1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) EXPORT_SYMBOL(sbi_ecall);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) int sbi_err_map_linux_errno(int err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) switch (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) case SBI_SUCCESS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) case SBI_ERR_DENIED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) return -EPERM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) case SBI_ERR_INVALID_PARAM:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) case SBI_ERR_INVALID_ADDRESS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) case SBI_ERR_NOT_SUPPORTED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) case SBI_ERR_FAILURE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) return -ENOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) EXPORT_SYMBOL(sbi_err_map_linux_errno);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #ifdef CONFIG_RISCV_SBI_V01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) * sbi_console_putchar() - Writes given character to the console device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) * @ch: The data to be written to the console.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) * Return: None
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) void sbi_console_putchar(int ch)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) sbi_ecall(SBI_EXT_0_1_CONSOLE_PUTCHAR, 0, ch, 0, 0, 0, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) EXPORT_SYMBOL(sbi_console_putchar);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) * sbi_console_getchar() - Reads a byte from console device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) * Returns the value read from console.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) int sbi_console_getchar(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) struct sbiret ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) ret = sbi_ecall(SBI_EXT_0_1_CONSOLE_GETCHAR, 0, 0, 0, 0, 0, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) return ret.error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) EXPORT_SYMBOL(sbi_console_getchar);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) * sbi_shutdown() - Remove all the harts from executing supervisor code.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) * Return: None
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) void sbi_shutdown(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) sbi_ecall(SBI_EXT_0_1_SHUTDOWN, 0, 0, 0, 0, 0, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) EXPORT_SYMBOL(sbi_shutdown);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) * sbi_clear_ipi() - Clear any pending IPIs for the calling hart.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) * Return: None
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) void sbi_clear_ipi(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) sbi_ecall(SBI_EXT_0_1_CLEAR_IPI, 0, 0, 0, 0, 0, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) EXPORT_SYMBOL(sbi_clear_ipi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) * sbi_set_timer_v01() - Program the timer for next timer event.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) * @stime_value: The value after which next timer event should fire.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) * Return: None
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) static void __sbi_set_timer_v01(uint64_t stime_value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #if __riscv_xlen == 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) sbi_ecall(SBI_EXT_0_1_SET_TIMER, 0, stime_value,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) stime_value >> 32, 0, 0, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) sbi_ecall(SBI_EXT_0_1_SET_TIMER, 0, stime_value, 0, 0, 0, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) static int __sbi_send_ipi_v01(const unsigned long *hart_mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) sbi_ecall(SBI_EXT_0_1_SEND_IPI, 0, (unsigned long)hart_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 0, 0, 0, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) static int __sbi_rfence_v01(int fid, const unsigned long *hart_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) unsigned long start, unsigned long size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) unsigned long arg4, unsigned long arg5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) int result = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) /* v0.2 function IDs are equivalent to v0.1 extension IDs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) switch (fid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) case SBI_EXT_RFENCE_REMOTE_FENCE_I:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) sbi_ecall(SBI_EXT_0_1_REMOTE_FENCE_I, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) (unsigned long)hart_mask, 0, 0, 0, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) sbi_ecall(SBI_EXT_0_1_REMOTE_SFENCE_VMA, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) (unsigned long)hart_mask, start, size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 0, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) sbi_ecall(SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) (unsigned long)hart_mask, start, size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) arg4, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) pr_err("SBI call [%d]not supported in SBI v0.1\n", fid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) result = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) return result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) static void sbi_set_power_off(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) pm_power_off = sbi_shutdown;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) static void __sbi_set_timer_v01(uint64_t stime_value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) pr_warn("Timer extension is not available in SBI v%lu.%lu\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) sbi_major_version(), sbi_minor_version());
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) static int __sbi_send_ipi_v01(const unsigned long *hart_mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) pr_warn("IPI extension is not available in SBI v%lu.%lu\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) sbi_major_version(), sbi_minor_version());
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) static int __sbi_rfence_v01(int fid, const unsigned long *hart_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) unsigned long start, unsigned long size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) unsigned long arg4, unsigned long arg5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) pr_warn("remote fence extension is not available in SBI v%lu.%lu\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) sbi_major_version(), sbi_minor_version());
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) static void sbi_set_power_off(void) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) #endif /* CONFIG_RISCV_SBI_V01 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) static void __sbi_set_timer_v02(uint64_t stime_value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) #if __riscv_xlen == 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) sbi_ecall(SBI_EXT_TIME, SBI_EXT_TIME_SET_TIMER, stime_value,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) stime_value >> 32, 0, 0, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) sbi_ecall(SBI_EXT_TIME, SBI_EXT_TIME_SET_TIMER, stime_value, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 0, 0, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) static int __sbi_send_ipi_v02(const unsigned long *hart_mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) unsigned long hartid, hmask_val, hbase;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) struct cpumask tmask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) struct sbiret ret = {0};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) int result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) if (!hart_mask || !(*hart_mask)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) riscv_cpuid_to_hartid_mask(cpu_online_mask, &tmask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) hart_mask = cpumask_bits(&tmask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) hmask_val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) hbase = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) for_each_set_bit(hartid, hart_mask, NR_CPUS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) if (hmask_val && ((hbase + BITS_PER_LONG) <= hartid)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) ret = sbi_ecall(SBI_EXT_IPI, SBI_EXT_IPI_SEND_IPI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) hmask_val, hbase, 0, 0, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) if (ret.error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) goto ecall_failed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) hmask_val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) hbase = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) if (!hmask_val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) hbase = hartid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) hmask_val |= 1UL << (hartid - hbase);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) if (hmask_val) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) ret = sbi_ecall(SBI_EXT_IPI, SBI_EXT_IPI_SEND_IPI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) hmask_val, hbase, 0, 0, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) if (ret.error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) goto ecall_failed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) ecall_failed:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) result = sbi_err_map_linux_errno(ret.error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) pr_err("%s: hbase = [%lu] hmask = [0x%lx] failed (error [%d])\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) __func__, hbase, hmask_val, result);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) return result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) static int __sbi_rfence_v02_call(unsigned long fid, unsigned long hmask_val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) unsigned long hbase, unsigned long start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) unsigned long size, unsigned long arg4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) unsigned long arg5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) struct sbiret ret = {0};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) int ext = SBI_EXT_RFENCE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) int result = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) switch (fid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) case SBI_EXT_RFENCE_REMOTE_FENCE_I:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) ret = sbi_ecall(ext, fid, hmask_val, hbase, 0, 0, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) ret = sbi_ecall(ext, fid, hmask_val, hbase, start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) size, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) ret = sbi_ecall(ext, fid, hmask_val, hbase, start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) size, arg4, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) ret = sbi_ecall(ext, fid, hmask_val, hbase, start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) size, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) ret = sbi_ecall(ext, fid, hmask_val, hbase, start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) size, arg4, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) case SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) ret = sbi_ecall(ext, fid, hmask_val, hbase, start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) size, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) case SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) ret = sbi_ecall(ext, fid, hmask_val, hbase, start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) size, arg4, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) pr_err("unknown function ID [%lu] for SBI extension [%d]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) fid, ext);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) result = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) if (ret.error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) result = sbi_err_map_linux_errno(ret.error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) pr_err("%s: hbase = [%lu] hmask = [0x%lx] failed (error [%d])\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) __func__, hbase, hmask_val, result);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) return result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) static int __sbi_rfence_v02(int fid, const unsigned long *hart_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) unsigned long start, unsigned long size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) unsigned long arg4, unsigned long arg5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) unsigned long hmask_val, hartid, hbase;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) struct cpumask tmask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) int result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) if (!hart_mask || !(*hart_mask)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) riscv_cpuid_to_hartid_mask(cpu_online_mask, &tmask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) hart_mask = cpumask_bits(&tmask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) hmask_val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) hbase = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) for_each_set_bit(hartid, hart_mask, NR_CPUS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) if (hmask_val && ((hbase + BITS_PER_LONG) <= hartid)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) result = __sbi_rfence_v02_call(fid, hmask_val, hbase,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) start, size, arg4, arg5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) if (result)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) return result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) hmask_val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) hbase = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) if (!hmask_val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) hbase = hartid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) hmask_val |= 1UL << (hartid - hbase);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) if (hmask_val) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) result = __sbi_rfence_v02_call(fid, hmask_val, hbase,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) start, size, arg4, arg5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) if (result)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) return result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) * sbi_set_timer() - Program the timer for next timer event.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) * @stime_value: The value after which next timer event should fire.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) * Return: None
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) void sbi_set_timer(uint64_t stime_value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) __sbi_set_timer(stime_value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) * sbi_send_ipi() - Send an IPI to any hart.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) * @hart_mask: A cpu mask containing all the target harts.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) * Return: None
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) void sbi_send_ipi(const unsigned long *hart_mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) __sbi_send_ipi(hart_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) EXPORT_SYMBOL(sbi_send_ipi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) * sbi_remote_fence_i() - Execute FENCE.I instruction on given remote harts.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) * @hart_mask: A cpu mask containing all the target harts.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) * Return: None
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) void sbi_remote_fence_i(const unsigned long *hart_mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) __sbi_rfence(SBI_EXT_RFENCE_REMOTE_FENCE_I,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) hart_mask, 0, 0, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) EXPORT_SYMBOL(sbi_remote_fence_i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) * sbi_remote_sfence_vma() - Execute SFENCE.VMA instructions on given remote
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) * harts for the specified virtual address range.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) * @hart_mask: A cpu mask containing all the target harts.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) * @start: Start of the virtual address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) * @size: Total size of the virtual address range.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) * Return: None
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) void sbi_remote_sfence_vma(const unsigned long *hart_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) unsigned long start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) unsigned long size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) __sbi_rfence(SBI_EXT_RFENCE_REMOTE_SFENCE_VMA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) hart_mask, start, size, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) EXPORT_SYMBOL(sbi_remote_sfence_vma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) * sbi_remote_sfence_vma_asid() - Execute SFENCE.VMA instructions on given
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) * remote harts for a virtual address range belonging to a specific ASID.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) * @hart_mask: A cpu mask containing all the target harts.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) * @start: Start of the virtual address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) * @size: Total size of the virtual address range.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) * @asid: The value of address space identifier (ASID).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) * Return: None
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) unsigned long start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) unsigned long size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) unsigned long asid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) __sbi_rfence(SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) hart_mask, start, size, asid, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) EXPORT_SYMBOL(sbi_remote_sfence_vma_asid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) * sbi_remote_hfence_gvma() - Execute HFENCE.GVMA instructions on given remote
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) * harts for the specified guest physical address range.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) * @hart_mask: A cpu mask containing all the target harts.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) * @start: Start of the guest physical address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) * @size: Total size of the guest physical address range.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) * Return: None
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) int sbi_remote_hfence_gvma(const unsigned long *hart_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) unsigned long start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) unsigned long size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) return __sbi_rfence(SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) hart_mask, start, size, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) EXPORT_SYMBOL_GPL(sbi_remote_hfence_gvma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) * sbi_remote_hfence_gvma_vmid() - Execute HFENCE.GVMA instructions on given
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) * remote harts for a guest physical address range belonging to a specific VMID.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) * @hart_mask: A cpu mask containing all the target harts.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) * @start: Start of the guest physical address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) * @size: Total size of the guest physical address range.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) * @vmid: The value of guest ID (VMID).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) * Return: 0 if success, Error otherwise.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) int sbi_remote_hfence_gvma_vmid(const unsigned long *hart_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) unsigned long start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) unsigned long size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) unsigned long vmid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) return __sbi_rfence(SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) hart_mask, start, size, vmid, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) EXPORT_SYMBOL(sbi_remote_hfence_gvma_vmid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) * sbi_remote_hfence_vvma() - Execute HFENCE.VVMA instructions on given remote
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) * harts for the current guest virtual address range.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) * @hart_mask: A cpu mask containing all the target harts.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) * @start: Start of the current guest virtual address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) * @size: Total size of the current guest virtual address range.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) * Return: None
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) int sbi_remote_hfence_vvma(const unsigned long *hart_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) unsigned long start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) unsigned long size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) return __sbi_rfence(SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) hart_mask, start, size, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) EXPORT_SYMBOL(sbi_remote_hfence_vvma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) * sbi_remote_hfence_vvma_asid() - Execute HFENCE.VVMA instructions on given
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) * remote harts for current guest virtual address range belonging to a specific
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) * ASID.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) * @hart_mask: A cpu mask containing all the target harts.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) * @start: Start of the current guest virtual address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) * @size: Total size of the current guest virtual address range.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) * @asid: The value of address space identifier (ASID).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) * Return: None
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) int sbi_remote_hfence_vvma_asid(const unsigned long *hart_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) unsigned long start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) unsigned long size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) unsigned long asid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) return __sbi_rfence(SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) hart_mask, start, size, asid, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) EXPORT_SYMBOL(sbi_remote_hfence_vvma_asid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) * sbi_probe_extension() - Check if an SBI extension ID is supported or not.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) * @extid: The extension ID to be probed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) * Return: Extension specific nonzero value f yes, -ENOTSUPP otherwise.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) int sbi_probe_extension(int extid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) struct sbiret ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) ret = sbi_ecall(SBI_EXT_BASE, SBI_EXT_BASE_PROBE_EXT, extid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) 0, 0, 0, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) if (!ret.error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) if (ret.value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) return ret.value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) return -ENOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) EXPORT_SYMBOL(sbi_probe_extension);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) static long __sbi_base_ecall(int fid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) struct sbiret ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) ret = sbi_ecall(SBI_EXT_BASE, fid, 0, 0, 0, 0, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) if (!ret.error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) return ret.value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) return sbi_err_map_linux_errno(ret.error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) static inline long sbi_get_spec_version(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) return __sbi_base_ecall(SBI_EXT_BASE_GET_SPEC_VERSION);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) static inline long sbi_get_firmware_id(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) return __sbi_base_ecall(SBI_EXT_BASE_GET_IMP_ID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) static inline long sbi_get_firmware_version(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) return __sbi_base_ecall(SBI_EXT_BASE_GET_IMP_VERSION);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) static void sbi_send_cpumask_ipi(const struct cpumask *target)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) struct cpumask hartid_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) riscv_cpuid_to_hartid_mask(target, &hartid_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) sbi_send_ipi(cpumask_bits(&hartid_mask));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) static struct riscv_ipi_ops sbi_ipi_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) .ipi_inject = sbi_send_cpumask_ipi
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) int __init sbi_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) sbi_set_power_off();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) ret = sbi_get_spec_version();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) if (ret > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) sbi_spec_version = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) pr_info("SBI specification v%lu.%lu detected\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) sbi_major_version(), sbi_minor_version());
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) if (!sbi_spec_is_0_1()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) pr_info("SBI implementation ID=0x%lx Version=0x%lx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) sbi_get_firmware_id(), sbi_get_firmware_version());
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) if (sbi_probe_extension(SBI_EXT_TIME) > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) __sbi_set_timer = __sbi_set_timer_v02;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) pr_info("SBI v0.2 TIME extension detected\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) __sbi_set_timer = __sbi_set_timer_v01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) if (sbi_probe_extension(SBI_EXT_IPI) > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) __sbi_send_ipi = __sbi_send_ipi_v02;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) pr_info("SBI v0.2 IPI extension detected\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) __sbi_send_ipi = __sbi_send_ipi_v01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) if (sbi_probe_extension(SBI_EXT_RFENCE) > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) __sbi_rfence = __sbi_rfence_v02;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) pr_info("SBI v0.2 RFENCE extension detected\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) __sbi_rfence = __sbi_rfence_v01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) __sbi_set_timer = __sbi_set_timer_v01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) __sbi_send_ipi = __sbi_send_ipi_v01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) __sbi_rfence = __sbi_rfence_v01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) riscv_set_ipi_ops(&sbi_ipi_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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