^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2012 Regents of the University of California
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/seq_file.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <asm/smp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * Returns the hart ID of the given device tree node, or -ENODEV if the node
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * isn't an enabled and valid RISC-V hart node.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) int riscv_of_processor_hartid(struct device_node *node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) const char *isa;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) u32 hart;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) if (!of_device_is_compatible(node, "riscv")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) pr_warn("Found incompatible CPU\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) if (of_property_read_u32(node, "reg", &hart)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) pr_warn("Found CPU without hart ID\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) if (!of_device_is_available(node)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) pr_info("CPU with hartid=%d is not available\n", hart);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) if (of_property_read_string(node, "riscv,isa", &isa)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) pr_warn("CPU with hartid=%d has no \"riscv,isa\" property\n", hart);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) if (isa[0] != 'r' || isa[1] != 'v') {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) pr_warn("CPU with hartid=%d has an invalid ISA of \"%s\"\n", hart, isa);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) return hart;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) * Find hart ID of the CPU DT node under which given DT node falls.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) * To achieve this, we walk up the DT tree until we find an active
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) * RISC-V core (HART) node and extract the cpuid from it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) int riscv_of_parent_hartid(struct device_node *node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) for (; node; node = node->parent) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) if (of_device_is_compatible(node, "riscv"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) return riscv_of_processor_hartid(node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #ifdef CONFIG_PROC_FS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) static void print_isa(struct seq_file *f, const char *isa)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) /* Print the entire ISA as it is */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) seq_puts(f, "isa\t\t: ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) seq_write(f, isa, strlen(isa));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) seq_puts(f, "\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) static void print_mmu(struct seq_file *f, const char *mmu_type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #if defined(CONFIG_32BIT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) if (strcmp(mmu_type, "riscv,sv32") != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #elif defined(CONFIG_64BIT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) if (strcmp(mmu_type, "riscv,sv39") != 0 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) strcmp(mmu_type, "riscv,sv48") != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) seq_printf(f, "mmu\t\t: %s\n", mmu_type+6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) static void *c_start(struct seq_file *m, loff_t *pos)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) *pos = cpumask_next(*pos - 1, cpu_online_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) if ((*pos) < nr_cpu_ids)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) return (void *)(uintptr_t)(1 + *pos);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) static void *c_next(struct seq_file *m, void *v, loff_t *pos)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) (*pos)++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) return c_start(m, pos);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) static void c_stop(struct seq_file *m, void *v)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) static int c_show(struct seq_file *m, void *v)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) unsigned long cpu_id = (unsigned long)v - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) struct device_node *node = of_get_cpu_node(cpu_id, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) const char *compat, *isa, *mmu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) seq_printf(m, "processor\t: %lu\n", cpu_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) seq_printf(m, "hart\t\t: %lu\n", cpuid_to_hartid_map(cpu_id));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) if (!of_property_read_string(node, "riscv,isa", &isa))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) print_isa(m, isa);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) if (!of_property_read_string(node, "mmu-type", &mmu))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) print_mmu(m, mmu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) if (!of_property_read_string(node, "compatible", &compat)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) && strcmp(compat, "riscv"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) seq_printf(m, "uarch\t\t: %s\n", compat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) seq_puts(m, "\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) of_node_put(node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) const struct seq_operations cpuinfo_op = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) .start = c_start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) .next = c_next,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) .stop = c_stop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) .show = c_show
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) #endif /* CONFIG_PROC_FS */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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