^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /* SPU ELF support for BFD.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) Copyright 2006 Free Software Foundation, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) This file is part of GDB, GAS, and the GNU binutils.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) /* These two enums are from rel_apu/common/spu_asm_format.h */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) /* definition of instruction format */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) typedef enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) RRR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) RI18,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) RI16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) RI10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) RI8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) RI7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) RR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) LBT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) LBTI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) IDATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) UNKNOWN_IFORMAT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) } spu_iformat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) /* These values describe assembly instruction arguments. They indicate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * how to encode, range checking and which relocation to use. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) typedef enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) A_T, /* register at pos 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) A_A, /* register at pos 7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) A_B, /* register at pos 14 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) A_C, /* register at pos 21 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) A_S, /* special purpose register at pos 7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) A_H, /* channel register at pos 7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) A_P, /* parenthesis, this has to separate regs from immediates */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) A_S3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) A_S6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) A_S7N,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) A_S7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) A_U7A,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) A_U7B,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) A_S10B,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) A_S10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) A_S11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) A_S11I,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) A_S14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) A_S16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) A_S18,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) A_R18,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) A_U3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) A_U5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) A_U6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) A_U7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) A_U14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) A_X16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) A_U18,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) A_MAX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) } spu_aformat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) enum spu_insns {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define APUOP(TAG,MACFORMAT,OPCODE,MNEMONIC,ASMFORMAT,DEP,PIPE) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) TAG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define APUOPFB(TAG,MACFORMAT,OPCODE,FB,MNEMONIC,ASMFORMAT,DEP,PIPE) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) TAG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #include "spu-insns.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #undef APUOP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #undef APUOPFB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) M_SPU_MAX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) struct spu_opcode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) spu_iformat insn_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) unsigned int opcode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) char *mnemonic;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) int arg[5];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define SIGNED_EXTRACT(insn,size,pos) (((int)((insn) << (32-size-pos))) >> (32-size))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define UNSIGNED_EXTRACT(insn,size,pos) (((insn) >> pos) & ((1 << size)-1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define DECODE_INSN_RT(insn) (insn & 0x7f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define DECODE_INSN_RA(insn) ((insn >> 7) & 0x7f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define DECODE_INSN_RB(insn) ((insn >> 14) & 0x7f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define DECODE_INSN_RC(insn) ((insn >> 21) & 0x7f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define DECODE_INSN_I10(insn) SIGNED_EXTRACT(insn,10,14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define DECODE_INSN_U10(insn) UNSIGNED_EXTRACT(insn,10,14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) /* For branching, immediate loads, hbr and lqa/stqa. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define DECODE_INSN_I16(insn) SIGNED_EXTRACT(insn,16,7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define DECODE_INSN_U16(insn) UNSIGNED_EXTRACT(insn,16,7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) /* for stop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define DECODE_INSN_U14(insn) UNSIGNED_EXTRACT(insn,14,0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) /* For ila */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define DECODE_INSN_I18(insn) SIGNED_EXTRACT(insn,18,7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define DECODE_INSN_U18(insn) UNSIGNED_EXTRACT(insn,18,7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) /* For rotate and shift and generate control mask */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define DECODE_INSN_I7(insn) SIGNED_EXTRACT(insn,7,14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #define DECODE_INSN_U7(insn) UNSIGNED_EXTRACT(insn,7,14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) /* For float <-> int conversion */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #define DECODE_INSN_I8(insn) SIGNED_EXTRACT(insn,8,14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #define DECODE_INSN_U8(insn) UNSIGNED_EXTRACT(insn,8,14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) /* For hbr */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #define DECODE_INSN_I9a(insn) ((SIGNED_EXTRACT(insn,2,23) << 7) | UNSIGNED_EXTRACT(insn,7,0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #define DECODE_INSN_I9b(insn) ((SIGNED_EXTRACT(insn,2,14) << 7) | UNSIGNED_EXTRACT(insn,7,0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #define DECODE_INSN_U9a(insn) ((UNSIGNED_EXTRACT(insn,2,23) << 7) | UNSIGNED_EXTRACT(insn,7,0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define DECODE_INSN_U9b(insn) ((UNSIGNED_EXTRACT(insn,2,14) << 7) | UNSIGNED_EXTRACT(insn,7,0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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