Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) #include <asm/ppc_asm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) #include <asm/asm-compat.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) /* unsigned long xmon_mfspr(sprn, default_value) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) _GLOBAL(xmon_mfspr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 	PPC_LL	r5, .Lmfspr_table@got(r2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 	b	xmon_mxspr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) /* void xmon_mtspr(sprn, new_value) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) _GLOBAL(xmon_mtspr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 	PPC_LL	r5, .Lmtspr_table@got(r2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 	b	xmon_mxspr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)  * r3 = sprn
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)  * r4 = default or new value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)  * r5 = table base
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) xmon_mxspr:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	 * To index into the table of mxsprs we need:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	 *  i = (sprn & 0x3ff) * 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	 * or using rwlinm:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	 *  i = (sprn << 3) & (0x3ff << 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	rlwinm	r3, r3, 3, 0x3ff << 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	add	r5, r5, r3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	mtctr	r5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	mr	r3, r4 /* put default_value in r3 for mfspr */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	bctr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) .Lmfspr_table:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	spr = 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	.rept	1024
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	mfspr	r3, spr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	blr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	spr = spr + 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	.endr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) .Lmtspr_table:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	spr = 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	.rept	1024
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 	mtspr	spr, r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 	blr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 	spr = spr + 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 	.endr