^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /* ppc-dis.c -- Disassemble PowerPC instructions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) Copyright (C) 1994-2016 Free Software Foundation, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) Written by Ian Lance Taylor, Cygnus Support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) This file is part of GDB, GAS, and the GNU binutils.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <asm/cputable.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <asm/cpu_has_feature.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include "nonstdio.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include "ansidecl.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include "ppc.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include "dis-asm.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) /* This file provides several disassembler functions, all of which use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) the disassembler interface defined in dis-asm.h. Several functions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) are provided because this file handles disassembly for the PowerPC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) in both big and little endian mode and also for the POWER (RS/6000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) chip. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) /* Extract the operand value from the PowerPC or POWER instruction. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) static long
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) operand_value_powerpc (const struct powerpc_operand *operand,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) unsigned long insn, ppc_cpu_t dialect)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) long value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) int invalid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) /* Extract the value from the instruction. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) if (operand->extract)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) value = (*operand->extract) (insn, dialect, &invalid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) if (operand->shift >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) value = (insn >> operand->shift) & operand->bitm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) value = (insn << -operand->shift) & operand->bitm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) /* BITM is always some number of zeros followed by some
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) number of ones, followed by some number of zeros. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) unsigned long top = operand->bitm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) /* top & -top gives the rightmost 1 bit, so this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) fills in any trailing zeros. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) top |= (top & -top) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) top &= ~(top >> 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) value = (value ^ top) - top;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) return value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) /* Determine whether the optional operand(s) should be printed. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) skip_optional_operands (const unsigned char *opindex,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) unsigned long insn, ppc_cpu_t dialect)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) const struct powerpc_operand *operand;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) for (; *opindex != 0; opindex++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) operand = &powerpc_operands[*opindex];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) if ((operand->flags & PPC_OPERAND_NEXT) != 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) || ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) && operand_value_powerpc (operand, insn, dialect) !=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) ppc_optional_operand_value (operand)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) /* Find a match for INSN in the opcode table, given machine DIALECT.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) A DIALECT of -1 is special, matching all machine opcode variations. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) static const struct powerpc_opcode *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) lookup_powerpc (unsigned long insn, ppc_cpu_t dialect)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) const struct powerpc_opcode *opcode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) const struct powerpc_opcode *opcode_end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) opcode_end = powerpc_opcodes + powerpc_num_opcodes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) /* Find the first match in the opcode table for this major opcode. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) for (opcode = powerpc_opcodes; opcode < opcode_end; ++opcode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) const unsigned char *opindex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) const struct powerpc_operand *operand;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) int invalid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) if ((insn & opcode->mask) != opcode->opcode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) || (dialect != (ppc_cpu_t) -1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) && ((opcode->flags & dialect) == 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) || (opcode->deprecated & dialect) != 0)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) /* Check validity of operands. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) invalid = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) for (opindex = opcode->operands; *opindex != 0; opindex++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) operand = powerpc_operands + *opindex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) if (operand->extract)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) (*operand->extract) (insn, dialect, &invalid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) if (invalid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) return opcode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) /* Print a PowerPC or POWER instruction. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) int print_insn_powerpc (unsigned long insn, unsigned long memaddr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) const struct powerpc_opcode *opcode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) bool insn_is_short;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) ppc_cpu_t dialect;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) dialect = PPC_OPCODE_PPC | PPC_OPCODE_COMMON
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) | PPC_OPCODE_64 | PPC_OPCODE_POWER4 | PPC_OPCODE_ALTIVEC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) if (cpu_has_feature(CPU_FTRS_POWER5))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) dialect |= PPC_OPCODE_POWER5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) if (cpu_has_feature(CPU_FTRS_CELL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) dialect |= (PPC_OPCODE_CELL | PPC_OPCODE_ALTIVEC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) if (cpu_has_feature(CPU_FTRS_POWER6))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) dialect |= (PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_ALTIVEC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) if (cpu_has_feature(CPU_FTRS_POWER7))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) dialect |= (PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) if (cpu_has_feature(CPU_FTRS_POWER8))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) dialect |= (PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) | PPC_OPCODE_POWER8 | PPC_OPCODE_HTM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) | PPC_OPCODE_ALTIVEC | PPC_OPCODE_ALTIVEC2 | PPC_OPCODE_VSX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) if (cpu_has_feature(CPU_FTRS_POWER9))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) dialect |= (PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9 | PPC_OPCODE_HTM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) | PPC_OPCODE_ALTIVEC | PPC_OPCODE_ALTIVEC2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) | PPC_OPCODE_VSX | PPC_OPCODE_VSX3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) /* Get the major opcode of the insn. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) opcode = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) insn_is_short = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) if (opcode == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) opcode = lookup_powerpc (insn, dialect);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) if (opcode == NULL && (dialect & PPC_OPCODE_ANY) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) opcode = lookup_powerpc (insn, (ppc_cpu_t) -1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) if (opcode != NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) const unsigned char *opindex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) const struct powerpc_operand *operand;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) int need_comma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) int need_paren;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) int skip_optional;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) if (opcode->operands[0] != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) printf("%-7s ", opcode->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) printf("%s", opcode->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) if (insn_is_short)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) /* The operands will be fetched out of the 16-bit instruction. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) insn >>= 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) /* Now extract and print the operands. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) need_comma = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) need_paren = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) skip_optional = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) for (opindex = opcode->operands; *opindex != 0; opindex++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) long value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) operand = powerpc_operands + *opindex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) /* Operands that are marked FAKE are simply ignored. We
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) already made sure that the extract function considered
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) the instruction to be valid. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) if ((operand->flags & PPC_OPERAND_FAKE) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) /* If all of the optional operands have the value zero,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) then don't print any of them. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) if (skip_optional < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) skip_optional = skip_optional_operands (opindex, insn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) dialect);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) if (skip_optional)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) value = operand_value_powerpc (operand, insn, dialect);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) if (need_comma)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) printf(",");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) need_comma = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) /* Print the operand as directed by the flags. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) if ((operand->flags & PPC_OPERAND_GPR) != 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) || ((operand->flags & PPC_OPERAND_GPR_0) != 0 && value != 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) printf("r%ld", value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) else if ((operand->flags & PPC_OPERAND_FPR) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) printf("f%ld", value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) else if ((operand->flags & PPC_OPERAND_VR) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) printf("v%ld", value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) else if ((operand->flags & PPC_OPERAND_VSR) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) printf("vs%ld", value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) print_address(memaddr + value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) print_address(value & 0xffffffff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) else if ((operand->flags & PPC_OPERAND_FSL) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) printf("fsl%ld", value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) else if ((operand->flags & PPC_OPERAND_FCR) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) printf("fcr%ld", value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) else if ((operand->flags & PPC_OPERAND_UDI) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) printf("%ld", value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) else if ((operand->flags & PPC_OPERAND_CR_REG) != 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) && (((dialect & PPC_OPCODE_PPC) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) || ((dialect & PPC_OPCODE_VLE) != 0)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) printf("cr%ld", value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) else if (((operand->flags & PPC_OPERAND_CR_BIT) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) && (((dialect & PPC_OPCODE_PPC) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) || ((dialect & PPC_OPCODE_VLE) != 0)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) static const char *cbnames[4] = { "lt", "gt", "eq", "so" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) int cr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) int cc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) cr = value >> 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) if (cr != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) printf("4*cr%d+", cr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) cc = value & 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) printf("%s", cbnames[cc]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) printf("%d", (int) value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) if (need_paren)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) printf(")");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) need_paren = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) if ((operand->flags & PPC_OPERAND_PARENS) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) need_comma = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) printf("(");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) need_paren = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) /* We have found and printed an instruction.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) If it was a short VLE instruction we have more to do. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) if (insn_is_short)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) memaddr += 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) return 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) /* Otherwise, return. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) return 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) /* We could not find a match. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) printf(".long 0x%lx", insn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) return 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) }