Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) #include <linux/smp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/cpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/spinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/msi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <asm/prom.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <asm/smp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <asm/machdep.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <asm/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <asm/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <asm/xics.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <asm/rtas.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) /* RTAS service tokens */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) static int ibm_get_xive;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) static int ibm_set_xive;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) static int ibm_int_on;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) static int ibm_int_off;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) static int ics_rtas_map(struct ics *ics, unsigned int virq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) static void ics_rtas_mask_unknown(struct ics *ics, unsigned long vec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) static long ics_rtas_get_server(struct ics *ics, unsigned long vec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) static int ics_rtas_host_match(struct ics *ics, struct device_node *node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) /* Only one global & state struct ics */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) static struct ics ics_rtas = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	.map		= ics_rtas_map,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	.mask_unknown	= ics_rtas_mask_unknown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	.get_server	= ics_rtas_get_server,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	.host_match	= ics_rtas_host_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) static void ics_rtas_unmask_irq(struct irq_data *d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	int call_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	int server;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	pr_devel("xics: unmask virq %d [hw 0x%x]\n", d->irq, hw_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	if (hw_irq == XICS_IPI || hw_irq == XICS_IRQ_SPURIOUS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	server = xics_get_irq_server(d->irq, irq_data_get_affinity_mask(d), 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	call_status = rtas_call_reentrant(ibm_set_xive, 3, 1, NULL, hw_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 					  server, DEFAULT_PRIORITY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	if (call_status != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 		printk(KERN_ERR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 			"%s: ibm_set_xive irq %u server %x returned %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 			__func__, hw_irq, server, call_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	/* Now unmask the interrupt (often a no-op) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	call_status = rtas_call_reentrant(ibm_int_on, 1, 1, NULL, hw_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	if (call_status != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 		printk(KERN_ERR "%s: ibm_int_on irq=%u returned %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 			__func__, hw_irq, call_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) static unsigned int ics_rtas_startup(struct irq_data *d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) #ifdef CONFIG_PCI_MSI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	 * The generic MSI code returns with the interrupt disabled on the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	 * card, using the MSI mask bits. Firmware doesn't appear to unmask
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	 * at that level, so we do it here by hand.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	if (irq_data_get_msi_desc(d))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 		pci_msi_unmask_irq(d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	/* unmask it */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	ics_rtas_unmask_irq(d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) static void ics_rtas_mask_real_irq(unsigned int hw_irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	int call_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	if (hw_irq == XICS_IPI)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	call_status = rtas_call_reentrant(ibm_int_off, 1, 1, NULL, hw_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	if (call_status != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 		printk(KERN_ERR "%s: ibm_int_off irq=%u returned %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 			__func__, hw_irq, call_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	/* Have to set XIVE to 0xff to be able to remove a slot */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	call_status = rtas_call_reentrant(ibm_set_xive, 3, 1, NULL, hw_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 					  xics_default_server, 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	if (call_status != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 		printk(KERN_ERR "%s: ibm_set_xive(0xff) irq=%u returned %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 			__func__, hw_irq, call_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) static void ics_rtas_mask_irq(struct irq_data *d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	pr_devel("xics: mask virq %d [hw 0x%x]\n", d->irq, hw_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	if (hw_irq == XICS_IPI || hw_irq == XICS_IRQ_SPURIOUS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	ics_rtas_mask_real_irq(hw_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) static int ics_rtas_set_affinity(struct irq_data *d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 				 const struct cpumask *cpumask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 				 bool force)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	int xics_status[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	int irq_server;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	if (hw_irq == XICS_IPI || hw_irq == XICS_IRQ_SPURIOUS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 		return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	status = rtas_call_reentrant(ibm_get_xive, 1, 3, xics_status, hw_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	if (status) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 		printk(KERN_ERR "%s: ibm,get-xive irq=%u returns %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 			__func__, hw_irq, status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 		return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	irq_server = xics_get_irq_server(d->irq, cpumask, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	if (irq_server == -1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 		pr_warn("%s: No online cpus in the mask %*pb for irq %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 			__func__, cpumask_pr_args(cpumask), d->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 		return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	status = rtas_call_reentrant(ibm_set_xive, 3, 1, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 				     hw_irq, irq_server, xics_status[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	if (status) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 		printk(KERN_ERR "%s: ibm,set-xive irq=%u returns %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 			__func__, hw_irq, status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 		return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	return IRQ_SET_MASK_OK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) static struct irq_chip ics_rtas_irq_chip = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	.name = "XICS",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	.irq_startup = ics_rtas_startup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	.irq_mask = ics_rtas_mask_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	.irq_unmask = ics_rtas_unmask_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	.irq_eoi = NULL, /* Patched at init time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	.irq_set_affinity = ics_rtas_set_affinity,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	.irq_set_type = xics_set_irq_type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	.irq_retrigger = xics_retrigger,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) static int ics_rtas_map(struct ics *ics, unsigned int virq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	unsigned int hw_irq = (unsigned int)virq_to_hw(virq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	int status[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	if (WARN_ON(hw_irq == XICS_IPI || hw_irq == XICS_IRQ_SPURIOUS))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	/* Check if RTAS knows about this interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	rc = rtas_call_reentrant(ibm_get_xive, 1, 3, status, hw_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 		return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	irq_set_chip_and_handler(virq, &ics_rtas_irq_chip, handle_fasteoi_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	irq_set_chip_data(virq, &ics_rtas);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) static void ics_rtas_mask_unknown(struct ics *ics, unsigned long vec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	ics_rtas_mask_real_irq(vec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) static long ics_rtas_get_server(struct ics *ics, unsigned long vec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	int rc, status[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	rc = rtas_call_reentrant(ibm_get_xive, 1, 3, status, vec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 		return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	return status[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) static int ics_rtas_host_match(struct ics *ics, struct device_node *node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	/* IBM machines have interrupt parents of various funky types for things
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	 * like vdevices, events, etc... The trick we use here is to match
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	 * everything here except the legacy 8259 which is compatible "chrp,iic"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	return !of_device_is_compatible(node, "chrp,iic");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) __init int ics_rtas_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	ibm_get_xive = rtas_token("ibm,get-xive");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	ibm_set_xive = rtas_token("ibm,set-xive");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	ibm_int_on  = rtas_token("ibm,int-on");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	ibm_int_off = rtas_token("ibm,int-off");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	/* We enable the RTAS "ICS" if RTAS is present with the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	 * appropriate tokens
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	if (ibm_get_xive == RTAS_UNKNOWN_SERVICE ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	    ibm_set_xive == RTAS_UNKNOWN_SERVICE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	/* We need to patch our irq chip's EOI to point to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	 * right ICP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	ics_rtas_irq_chip.irq_eoi = icp_ops->eoi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	/* Register ourselves */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	xics_register_ics(&ics_rtas);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)