Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Copyright 2006-2007, Michael Ellerman, IBM Corporation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) #include <linux/bitmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #include <linux/msi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #include <asm/mpic.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <asm/prom.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <asm/hw_irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <asm/ppc-pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <asm/msi_bitmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <sysdev/mpic.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) void mpic_msi_reserve_hwirq(struct mpic *mpic, irq_hw_number_t hwirq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 	/* The mpic calls this even when there is no allocator setup */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	if (!mpic->msi_bitmap.bitmap)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, hwirq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #ifdef CONFIG_MPIC_U3_HT_IRQS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) static int mpic_msi_reserve_u3_hwirqs(struct mpic *mpic)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	irq_hw_number_t hwirq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	const struct irq_domain_ops *ops = mpic->irqhost->ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	struct device_node *np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	int flags, index, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	struct of_phandle_args oirq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	pr_debug("mpic: found U3, guessing msi allocator setup\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	/* Reserve source numbers we know are reserved in the HW.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	 * This is a bit of a mix of U3 and U4 reserves but that's going
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	 * to work fine, we have plenty enugh numbers left so let's just
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	 * mark anything we don't like reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	for (i = 0;   i < 8;   i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 		msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 	for (i = 42;  i < 46;  i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 		msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 	for (i = 100; i < 105; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 		msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 	for (i = 124; i < mpic->num_sources; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 		msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 	np = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 	while ((np = of_find_all_nodes(np))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 		pr_debug("mpic: mapping hwirqs for %pOF\n", np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 		index = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 		while (of_irq_parse_one(np, index++, &oirq) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 			ops->xlate(mpic->irqhost, NULL, oirq.args,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 						oirq.args_count, &hwirq, &flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 			msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, hwirq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) static int mpic_msi_reserve_u3_hwirqs(struct mpic *mpic)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) 	return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) int mpic_msi_init_allocator(struct mpic *mpic)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) 	int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) 	rc = msi_bitmap_alloc(&mpic->msi_bitmap, mpic->num_sources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) 			      irq_domain_get_of_node(mpic->irqhost));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) 	if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) 		return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) 	rc = msi_bitmap_reserve_dt_hwirqs(&mpic->msi_bitmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) 	if (rc > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) 		if (mpic->flags & MPIC_U3_HT_IRQS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) 			rc = mpic_msi_reserve_u3_hwirqs(mpic);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) 		if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) 			msi_bitmap_free(&mpic->msi_bitmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) 			return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) }