^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) #ifndef _POWERPC_SYSDEV_MPIC_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #define _POWERPC_SYSDEV_MPIC_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright 2006-2007, Michael Ellerman, IBM Corporation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #ifdef CONFIG_PCI_MSI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) extern void mpic_msi_reserve_hwirq(struct mpic *mpic, irq_hw_number_t hwirq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) extern int mpic_msi_init_allocator(struct mpic *mpic);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) extern int mpic_u3msi_init(struct mpic *mpic);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) static inline void mpic_msi_reserve_hwirq(struct mpic *mpic,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) irq_hw_number_t hwirq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) static inline int mpic_u3msi_init(struct mpic *mpic)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #if defined(CONFIG_PCI_MSI) && defined(CONFIG_PPC_PASEMI)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) int mpic_pasemi_msi_init(struct mpic *mpic);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) static inline int mpic_pasemi_msi_init(struct mpic *mpic) { return -1; }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) extern int mpic_set_irq_type(struct irq_data *d, unsigned int flow_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) extern void mpic_set_vector(unsigned int virq, unsigned int vector);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) extern int mpic_set_affinity(struct irq_data *d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) const struct cpumask *cpumask, bool force);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) extern void mpic_reset_core(int cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #ifdef CONFIG_FSL_SOC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) extern int mpic_map_error_int(struct mpic *mpic, unsigned int virq, irq_hw_number_t hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) extern void mpic_err_int_init(struct mpic *mpic, irq_hw_number_t irqnum);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) extern int mpic_setup_error_int(struct mpic *mpic, int intvec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) static inline int mpic_map_error_int(struct mpic *mpic, unsigned int virq, irq_hw_number_t hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) static inline void mpic_err_int_init(struct mpic *mpic, irq_hw_number_t irqnum)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) static inline int mpic_setup_error_int(struct mpic *mpic, int intvec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #endif /* _POWERPC_SYSDEV_MPIC_H */