^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Freescale MPC85xx/MPC86xx RapidIO support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright 2009 Sysgo AG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Thomas Moll <thomas.moll@sysgo.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * - fixed maintenance access routines, check for aligned access
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Copyright 2009 Integrated Device Technology, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Alex Bounine <alexandre.bounine@idt.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * - Added Port-Write message handling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * - Added Machine Check exception handling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * Copyright (C) 2007, 2008, 2010, 2011 Freescale Semiconductor, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * Zhang Wei <wei.zhang@freescale.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * Lian Minghuan-B31939 <Minghuan.Lian@freescale.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * Liu Gang <Gang.Liu@freescale.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * Copyright 2005 MontaVista Software, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * Matt Porter <mporter@kernel.crashing.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #ifndef __FSL_RIO_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define __FSL_RIO_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/rio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/rio_drv.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/kfifo.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define RIO_REGS_WIN(mport) (((struct rio_priv *)(mport->priv))->regs_win)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define RIO_MAINT_WIN_SIZE 0x400000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define RIO_LTLEDCSR 0x0608
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define DOORBELL_ROWAR_EN 0x80000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define DOORBELL_ROWAR_TFLOWLV 0x08000000 /* highest priority level */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define DOORBELL_ROWAR_PCI 0x02000000 /* PCI window */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define DOORBELL_ROWAR_NREAD 0x00040000 /* NREAD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define DOORBELL_ROWAR_MAINTRD 0x00070000 /* maintenance read */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define DOORBELL_ROWAR_RES 0x00002000 /* wrtpy: reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define DOORBELL_ROWAR_MAINTWD 0x00007000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define DOORBELL_ROWAR_SIZE 0x0000000b /* window size is 4k */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define RIO_ATMU_REGS_PORT1_OFFSET 0x10c00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define RIO_ATMU_REGS_PORT2_OFFSET 0x10e00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define RIO_S_DBELL_REGS_OFFSET 0x13400
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define RIO_S_PW_REGS_OFFSET 0x134e0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define RIO_ATMU_REGS_DBELL_OFFSET 0x10C40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define RIO_INB_ATMU_REGS_PORT1_OFFSET 0x10d60
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define RIO_INB_ATMU_REGS_PORT2_OFFSET 0x10f60
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define MAX_MSG_UNIT_NUM 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define MAX_PORT_NUM 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define RIO_INB_ATMU_COUNT 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) struct rio_atmu_regs {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) u32 rowtar;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) u32 rowtear;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) u32 rowbar;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) u32 pad1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) u32 rowar;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) u32 pad2[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) struct rio_inb_atmu_regs {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) u32 riwtar;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) u32 pad1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) u32 riwbar;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) u32 pad2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) u32 riwar;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) u32 pad3[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) struct rio_dbell_ring {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) void *virt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) dma_addr_t phys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) struct rio_port_write_msg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) void *virt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) dma_addr_t phys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) u32 msg_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) u32 err_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) u32 discard_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) struct fsl_rio_dbell {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) struct rio_mport *mport[MAX_PORT_NUM];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) struct rio_dbell_regs __iomem *dbell_regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) struct rio_dbell_ring dbell_ring;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) int bellirq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) struct fsl_rio_pw {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) struct rio_mport *mport[MAX_PORT_NUM];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) struct rio_pw_regs __iomem *pw_regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) struct rio_port_write_msg port_write_msg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) int pwirq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) struct work_struct pw_work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) struct kfifo pw_fifo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) spinlock_t pw_fifo_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) struct rio_priv {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) void __iomem *regs_win;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) struct rio_atmu_regs __iomem *atmu_regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) struct rio_atmu_regs __iomem *maint_atmu_regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) struct rio_inb_atmu_regs __iomem *inb_atmu_regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) void __iomem *maint_win;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) void *rmm_handle; /* RapidIO message manager(unit) Handle */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) extern void __iomem *rio_regs_win;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) extern void __iomem *rmu_regs_win;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) extern resource_size_t rio_law_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) extern struct fsl_rio_dbell *dbell;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) extern struct fsl_rio_pw *pw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) extern int fsl_rio_setup_rmu(struct rio_mport *mport,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) struct device_node *node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) extern int fsl_rio_port_write_init(struct fsl_rio_pw *pw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) extern int fsl_rio_pw_enable(struct rio_mport *mport, int enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) extern void fsl_rio_port_error_handler(int offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) extern int fsl_rio_doorbell_init(struct fsl_rio_dbell *dbell);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) extern int fsl_rio_doorbell_send(struct rio_mport *mport,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) int index, u16 destid, u16 data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) extern int fsl_add_outb_message(struct rio_mport *mport,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) struct rio_dev *rdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) int mbox, void *buffer, size_t len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) extern int fsl_open_outb_mbox(struct rio_mport *mport,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) void *dev_id, int mbox, int entries);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) extern void fsl_close_outb_mbox(struct rio_mport *mport, int mbox);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) extern int fsl_open_inb_mbox(struct rio_mport *mport,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) void *dev_id, int mbox, int entries);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) extern void fsl_close_inb_mbox(struct rio_mport *mport, int mbox);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) extern int fsl_add_inb_buffer(struct rio_mport *mport, int mbox, void *buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) extern void *fsl_get_inb_message(struct rio_mport *mport, int mbox);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) #endif
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags