^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * "Indirect" DCR access
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 2004 Eugene Surovegin <ebs@ebshome.net>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <asm/ppc_asm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <asm/processor.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <asm/bug.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <asm/export.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define DCR_ACCESS_PROLOG(table) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) cmplwi cr0,r3,1024; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) rlwinm r3,r3,4,18,27; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) lis r5,table@h; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) ori r5,r5,table@l; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) add r3,r3,r5; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) bge- 1f; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) mtctr r3; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) bctr; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 1: trap; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) EMIT_BUG_ENTRY 1b,__FILE__,__LINE__,0; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) blr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) _GLOBAL(__mfdcr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) DCR_ACCESS_PROLOG(__mfdcr_table)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) EXPORT_SYMBOL(__mfdcr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) _GLOBAL(__mtdcr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) DCR_ACCESS_PROLOG(__mtdcr_table)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) EXPORT_SYMBOL(__mtdcr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) __mfdcr_table:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) mfdcr r3,0; blr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) __mtdcr_table:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) mtdcr 0,r4; blr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) dcr = 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) .rept 1023
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) mfdcr r3,dcr; blr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) mtdcr dcr,r4; blr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) dcr = dcr + 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) .endr