^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * PowerPC version
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * and Cort Dougan (PReP) (cort@cs.nmt.edu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Copyright (C) 1996 Paul Mackerras
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * PPC44x/36-bit changes by Matt Porter (mporter@mvista.com)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * Derived from "arch/i386/mm/init.c"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/export.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/sched.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/string.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/gfp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/mm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/stddef.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/memblock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/highmem.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/initrd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/pagemap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/suspend.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/hugetlb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <linux/vmalloc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <linux/memremap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <linux/dma-direct.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <linux/kprobes.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include <asm/prom.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #include <asm/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #include <asm/mmu_context.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #include <asm/mmu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #include <asm/smp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #include <asm/machdep.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #include <asm/btext.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #include <asm/tlb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #include <asm/sections.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #include <asm/sparsemem.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #include <asm/vdso.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #include <asm/fixmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #include <asm/swiotlb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #include <asm/rtas.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #include <asm/kasan.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #include <asm/svm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #include <asm/mmzone.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #include <mm/mmu_decl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #ifndef CPU_FTR_COHERENT_ICACHE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define CPU_FTR_COHERENT_ICACHE 0 /* XXX for now */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define CPU_FTR_NOEXECUTE 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) unsigned long long memory_limit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) bool init_mem_is_free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #ifdef CONFIG_HIGHMEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) pte_t *kmap_pte;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) EXPORT_SYMBOL(kmap_pte);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) unsigned long size, pgprot_t vma_prot)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) if (ppc_md.phys_mem_access_prot)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) return ppc_md.phys_mem_access_prot(file, pfn, size, vma_prot);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) if (!page_is_ram(pfn))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) vma_prot = pgprot_noncached(vma_prot);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) return vma_prot;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) EXPORT_SYMBOL(phys_mem_access_prot);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #ifdef CONFIG_MEMORY_HOTPLUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #ifdef CONFIG_NUMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) int memory_add_physaddr_to_nid(u64 start)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) return hot_add_scn_to_nid(start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) int __weak create_section_mapping(unsigned long start, unsigned long end,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) int nid, pgprot_t prot)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) int __weak remove_section_mapping(unsigned long start, unsigned long end)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define FLUSH_CHUNK_SIZE SZ_1G
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) * flush_dcache_range_chunked(): Write any modified data cache blocks out to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) * memory and invalidate them, in chunks of up to FLUSH_CHUNK_SIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) * Does not invalidate the corresponding instruction cache blocks.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) * @start: the start address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) * @stop: the stop address (exclusive)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) * @chunk: the max size of the chunks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) static void flush_dcache_range_chunked(unsigned long start, unsigned long stop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) unsigned long chunk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) unsigned long i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) for (i = start; i < stop; i += chunk) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) flush_dcache_range(i, min(stop, i + chunk));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) cond_resched();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) int __ref arch_add_memory(int nid, u64 start, u64 size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) struct mhp_params *params)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) unsigned long start_pfn = start >> PAGE_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) unsigned long nr_pages = size >> PAGE_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) start = (unsigned long)__va(start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) rc = create_section_mapping(start, start + size, nid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) params->pgprot);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) pr_warn("Unable to create mapping for hot added memory 0x%llx..0x%llx: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) start, start + size, rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) return __add_pages(nid, start_pfn, nr_pages, params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) void __ref arch_remove_memory(int nid, u64 start, u64 size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) struct vmem_altmap *altmap)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) unsigned long start_pfn = start >> PAGE_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) unsigned long nr_pages = size >> PAGE_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) __remove_pages(start_pfn, nr_pages, altmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) /* Remove htab bolted mappings for this section of memory */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) start = (unsigned long)__va(start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) flush_dcache_range_chunked(start, start + size, FLUSH_CHUNK_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) ret = remove_section_mapping(start, start + size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) WARN_ON_ONCE(ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) /* Ensure all vmalloc mappings are flushed in case they also
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) * hit that section of memory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) vm_unmap_aliases();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) #ifndef CONFIG_NEED_MULTIPLE_NODES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) void __init mem_topology_setup(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) max_low_pfn = max_pfn = memblock_end_of_DRAM() >> PAGE_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) min_low_pfn = MEMORY_START >> PAGE_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) #ifdef CONFIG_HIGHMEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) max_low_pfn = lowmem_end_addr >> PAGE_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) /* Place all memblock_regions in the same node and merge contiguous
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) * memblock_regions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) memblock_set_node(0, PHYS_ADDR_MAX, &memblock.memory, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) void __init initmem_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) sparse_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) /* mark pages that don't exist as nosave */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) static int __init mark_nonram_nosave(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) unsigned long spfn, epfn, prev = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) for_each_mem_pfn_range(i, MAX_NUMNODES, &spfn, &epfn, NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) if (prev && prev < spfn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) register_nosave_region(prev, spfn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) prev = epfn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) #else /* CONFIG_NEED_MULTIPLE_NODES */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) static int __init mark_nonram_nosave(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) * Zones usage:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) * We setup ZONE_DMA to be 31-bits on all platforms and ZONE_NORMAL to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) * everything else. GFP_DMA32 page allocations automatically fall back to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) * ZONE_DMA.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) * By using 31-bit unconditionally, we can exploit zone_dma_bits to inform the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) * generic DMA mapping code. 32-bit only devices (if not handled by an IOMMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) * anyway) will take a first dip into ZONE_NORMAL and get otherwise served by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) * ZONE_DMA.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) static unsigned long max_zone_pfns[MAX_NR_ZONES];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) * paging_init() sets up the page tables - in fact we've already done this.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) void __init paging_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) unsigned long long total_ram = memblock_phys_mem_size();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) phys_addr_t top_of_ram = memblock_end_of_DRAM();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) #ifdef CONFIG_HIGHMEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) unsigned long v = __fix_to_virt(FIX_KMAP_END);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) unsigned long end = __fix_to_virt(FIX_KMAP_BEGIN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) for (; v < end; v += PAGE_SIZE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) map_kernel_page(v, 0, __pgprot(0)); /* XXX gross */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) map_kernel_page(PKMAP_BASE, 0, __pgprot(0)); /* XXX gross */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) pkmap_page_table = virt_to_kpte(PKMAP_BASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) kmap_pte = virt_to_kpte(__fix_to_virt(FIX_KMAP_BEGIN));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) #endif /* CONFIG_HIGHMEM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) printk(KERN_DEBUG "Top of RAM: 0x%llx, Total RAM: 0x%llx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) (unsigned long long)top_of_ram, total_ram);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) printk(KERN_DEBUG "Memory hole size: %ldMB\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) (long int)((top_of_ram - total_ram) >> 20));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) * Allow 30-bit DMA for very limited Broadcom wifi chips on many
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) * powerbooks.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) if (IS_ENABLED(CONFIG_PPC32))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) zone_dma_bits = 30;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) zone_dma_bits = 31;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) #ifdef CONFIG_ZONE_DMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) max_zone_pfns[ZONE_DMA] = min(max_low_pfn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 1UL << (zone_dma_bits - PAGE_SHIFT));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) max_zone_pfns[ZONE_NORMAL] = max_low_pfn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) #ifdef CONFIG_HIGHMEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) max_zone_pfns[ZONE_HIGHMEM] = max_pfn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) free_area_init(max_zone_pfns);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) mark_nonram_nosave();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) void __init mem_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) * book3s is limited to 16 page sizes due to encoding this in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) * a 4-bit field for slices.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) BUILD_BUG_ON(MMU_PAGE_COUNT > 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) #ifdef CONFIG_SWIOTLB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) * Some platforms (e.g. 85xx) limit DMA-able memory way below
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) * 4G. We force memblock to bottom-up mode to ensure that the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) * memory allocated in swiotlb_init() is DMA-able.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) * As it's the last memblock allocation, no need to reset it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) * back to to-down.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) memblock_set_bottom_up(true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) if (is_secure_guest())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) svm_swiotlb_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) swiotlb_init(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) high_memory = (void *) __va(max_low_pfn * PAGE_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) set_max_mapnr(max_pfn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) kasan_late_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) memblock_free_all();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) #ifdef CONFIG_HIGHMEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) unsigned long pfn, highmem_mapnr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) highmem_mapnr = lowmem_end_addr >> PAGE_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) for (pfn = highmem_mapnr; pfn < max_mapnr; ++pfn) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) phys_addr_t paddr = (phys_addr_t)pfn << PAGE_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) struct page *page = pfn_to_page(pfn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) if (!memblock_is_reserved(paddr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) free_highmem_page(page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) #endif /* CONFIG_HIGHMEM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) #if defined(CONFIG_PPC_FSL_BOOK3E) && !defined(CONFIG_SMP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) * If smp is enabled, next_tlbcam_idx is initialized in the cpu up
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) * functions.... do it here for the non-smp case.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) per_cpu(next_tlbcam_idx, smp_processor_id()) =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) (mfspr(SPRN_TLB1CFG) & TLBnCFG_N_ENTRY) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) mem_init_print_info(NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) #ifdef CONFIG_PPC32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) pr_info("Kernel virtual memory layout:\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) #ifdef CONFIG_KASAN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) pr_info(" * 0x%08lx..0x%08lx : kasan shadow mem\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) KASAN_SHADOW_START, KASAN_SHADOW_END);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) pr_info(" * 0x%08lx..0x%08lx : fixmap\n", FIXADDR_START, FIXADDR_TOP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) #ifdef CONFIG_HIGHMEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) pr_info(" * 0x%08lx..0x%08lx : highmem PTEs\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) PKMAP_BASE, PKMAP_ADDR(LAST_PKMAP));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) #endif /* CONFIG_HIGHMEM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) if (ioremap_bot != IOREMAP_TOP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) pr_info(" * 0x%08lx..0x%08lx : early ioremap\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) ioremap_bot, IOREMAP_TOP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) pr_info(" * 0x%08lx..0x%08lx : vmalloc & ioremap\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) VMALLOC_START, VMALLOC_END);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) #endif /* CONFIG_PPC32 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) void free_initmem(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) ppc_md.progress = ppc_printk_progress;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) mark_initmem_nx();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) init_mem_is_free = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) free_initmem_default(POISON_FREE_INITMEM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) * flush_coherent_icache() - if a CPU has a coherent icache, flush it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) * @addr: The base address to use (can be any valid address, the whole cache will be flushed)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) * Return true if the cache was flushed, false otherwise
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) static inline bool flush_coherent_icache(unsigned long addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) * For a snooping icache, we still need a dummy icbi to purge all the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) * prefetched instructions from the ifetch buffers. We also need a sync
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) * before the icbi to order the the actual stores to memory that might
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) * have modified instructions with the icbi.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) if (cpu_has_feature(CPU_FTR_COHERENT_ICACHE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) mb(); /* sync */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) allow_read_from_user((const void __user *)addr, L1_CACHE_BYTES);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) icbi((void *)addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) prevent_read_from_user((const void __user *)addr, L1_CACHE_BYTES);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) mb(); /* sync */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) isync();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) * invalidate_icache_range() - Flush the icache by issuing icbi across an address range
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) * @start: the start address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) * @stop: the stop address (exclusive)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) static void invalidate_icache_range(unsigned long start, unsigned long stop)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) unsigned long shift = l1_icache_shift();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) unsigned long bytes = l1_icache_bytes();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) char *addr = (char *)(start & ~(bytes - 1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) unsigned long size = stop - (unsigned long)addr + (bytes - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) unsigned long i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) for (i = 0; i < size >> shift; i++, addr += bytes)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) icbi(addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) mb(); /* sync */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) isync();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) * flush_icache_range: Write any modified data cache blocks out to memory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) * and invalidate the corresponding blocks in the instruction cache
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) * Generic code will call this after writing memory, before executing from it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) * @start: the start address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) * @stop: the stop address (exclusive)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) void flush_icache_range(unsigned long start, unsigned long stop)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) if (flush_coherent_icache(start))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) clean_dcache_range(start, stop);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) if (IS_ENABLED(CONFIG_44x)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) * Flash invalidate on 44x because we are passed kmapped
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) * addresses and this doesn't work for userspace pages due to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) * the virtually tagged icache.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) iccci((void *)start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) mb(); /* sync */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) isync();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) invalidate_icache_range(start, stop);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) EXPORT_SYMBOL(flush_icache_range);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) #if !defined(CONFIG_PPC_8xx) && !defined(CONFIG_PPC64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) * flush_dcache_icache_phys() - Flush a page by it's physical address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) * @physaddr: the physical address of the page
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) static void flush_dcache_icache_phys(unsigned long physaddr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) unsigned long bytes = l1_dcache_bytes();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) unsigned long nb = PAGE_SIZE / bytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) unsigned long addr = physaddr & PAGE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) unsigned long msr, msr0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) unsigned long loop1 = addr, loop2 = addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) msr0 = mfmsr();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) msr = msr0 & ~MSR_DR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) * This must remain as ASM to prevent potential memory accesses
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) * while the data MMU is disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) asm volatile(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) " mtctr %2;\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) " mtmsr %3;\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) " isync;\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) "0: dcbst 0, %0;\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) " addi %0, %0, %4;\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) " bdnz 0b;\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) " sync;\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) " mtctr %2;\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) "1: icbi 0, %1;\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) " addi %1, %1, %4;\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) " bdnz 1b;\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) " sync;\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) " mtmsr %5;\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) " isync;\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) : "+&r" (loop1), "+&r" (loop2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) : "r" (nb), "r" (msr), "i" (bytes), "r" (msr0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) : "ctr", "memory");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) NOKPROBE_SYMBOL(flush_dcache_icache_phys)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) #endif // !defined(CONFIG_PPC_8xx) && !defined(CONFIG_PPC64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) * This is called when a page has been modified by the kernel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) * It just marks the page as not i-cache clean. We do the i-cache
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) * flush later when the page is given to a user process, if necessary.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) void flush_dcache_page(struct page *page)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) if (cpu_has_feature(CPU_FTR_COHERENT_ICACHE))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) /* avoid an atomic op if possible */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) if (test_bit(PG_arch_1, &page->flags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) clear_bit(PG_arch_1, &page->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) EXPORT_SYMBOL(flush_dcache_page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) void flush_dcache_icache_page(struct page *page)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) #ifdef CONFIG_HUGETLB_PAGE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) if (PageCompound(page)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) flush_dcache_icache_hugepage(page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) #if defined(CONFIG_PPC_8xx) || defined(CONFIG_PPC64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) /* On 8xx there is no need to kmap since highmem is not supported */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) __flush_dcache_icache(page_address(page));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) if (IS_ENABLED(CONFIG_BOOKE) || sizeof(phys_addr_t) > sizeof(void *)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) void *start = kmap_atomic(page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) __flush_dcache_icache(start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) kunmap_atomic(start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) unsigned long addr = page_to_pfn(page) << PAGE_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) if (flush_coherent_icache(addr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) flush_dcache_icache_phys(addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) EXPORT_SYMBOL(flush_dcache_icache_page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) * __flush_dcache_icache(): Flush a particular page from the data cache to RAM.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) * Note: this is necessary because the instruction cache does *not*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) * snoop from the data cache.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) * @page: the address of the page to flush
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) void __flush_dcache_icache(void *p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) unsigned long addr = (unsigned long)p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) if (flush_coherent_icache(addr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) clean_dcache_range(addr, addr + PAGE_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) * We don't flush the icache on 44x. Those have a virtual icache and we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) * don't have access to the virtual address here (it's not the page
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) * vaddr but where it's mapped in user space). The flushing of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) * icache on these is handled elsewhere, when a change in the address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) * space occurs, before returning to user space.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) if (mmu_has_feature(MMU_FTR_TYPE_44x))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) invalidate_icache_range(addr, addr + PAGE_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) void clear_user_page(void *page, unsigned long vaddr, struct page *pg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) clear_page(page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) * We shouldn't have to do this, but some versions of glibc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) * require it (ld.so assumes zero filled pages are icache clean)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) * - Anton
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) flush_dcache_page(pg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) EXPORT_SYMBOL(clear_user_page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) void copy_user_page(void *vto, void *vfrom, unsigned long vaddr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) struct page *pg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) copy_page(vto, vfrom);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) * We should be able to use the following optimisation, however
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) * there are two problems.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) * Firstly a bug in some versions of binutils meant PLT sections
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) * were not marked executable.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) * Secondly the first word in the GOT section is blrl, used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) * to establish the GOT address. Until recently the GOT was
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) * not marked executable.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) * - Anton
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) if (!vma->vm_file && ((vma->vm_flags & VM_EXEC) == 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) flush_dcache_page(pg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) void flush_icache_user_page(struct vm_area_struct *vma, struct page *page,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) unsigned long addr, int len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) unsigned long maddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) maddr = (unsigned long) kmap(page) + (addr & ~PAGE_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) flush_icache_range(maddr, maddr + len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) kunmap(page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) * System memory should not be in /proc/iomem but various tools expect it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) * (eg kdump).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) static int __init add_system_ram_resources(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) phys_addr_t start, end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) u64 i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) for_each_mem_range(i, &start, &end) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) res = kzalloc(sizeof(struct resource), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) WARN_ON(!res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) if (res) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) res->name = "System RAM";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) res->start = start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) * In memblock, end points to the first byte after
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) * the range while in resourses, end points to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) * last byte in the range.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) res->end = end - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) res->flags = IORESOURCE_SYSTEM_RAM | IORESOURCE_BUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) WARN_ON(request_resource(&iomem_resource, res) < 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) subsys_initcall(add_system_ram_resources);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) #ifdef CONFIG_STRICT_DEVMEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) * devmem_is_allowed(): check to see if /dev/mem access to a certain address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) * is valid. The argument is a physical page number.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) * Access has to be given to non-kernel-ram areas as well, these contain the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) * PCI mmio resources as well as potential bios/acpi data regions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) int devmem_is_allowed(unsigned long pfn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) if (page_is_rtas_user_buf(pfn))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) if (iomem_is_exclusive(PFN_PHYS(pfn)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) if (!page_is_ram(pfn))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) #endif /* CONFIG_STRICT_DEVMEM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) * This is defined in kernel/resource.c but only powerpc needs to export it, for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) * the EHEA driver. Drop this when drivers/net/ethernet/ibm/ehea is removed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) EXPORT_SYMBOL_GPL(walk_system_ram_range);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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