Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *  PowerPC version derived from arch/arm/mm/consistent.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *    Copyright (C) 2001 Dan Malek (dmalek@jlc.net)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *  Copyright (C) 2000 Russell King
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/highmem.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/dma-direct.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/dma-map-ops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <asm/tlbflush.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <asm/dma.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20)  * make an area consistent.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) static void __dma_sync(void *vaddr, size_t size, int direction)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 	unsigned long start = (unsigned long)vaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 	unsigned long end   = start + size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 	switch (direction) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 	case DMA_NONE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 		BUG();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	case DMA_FROM_DEVICE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 		 * invalidate only when cache-line aligned otherwise there is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 		 * the potential for discarding uncommitted data from the cache
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 		if ((start | end) & (L1_CACHE_BYTES - 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 			flush_dcache_range(start, end);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 		else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 			invalidate_dcache_range(start, end);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	case DMA_TO_DEVICE:		/* writeback only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 		clean_dcache_range(start, end);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	case DMA_BIDIRECTIONAL:	/* writeback and invalidate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 		flush_dcache_range(start, end);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) #ifdef CONFIG_HIGHMEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51)  * __dma_sync_page() implementation for systems using highmem.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52)  * In this case, each page of a buffer must be kmapped/kunmapped
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53)  * in order to have a virtual address for __dma_sync(). This must
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54)  * not sleep so kmap_atomic()/kunmap_atomic() are used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56)  * Note: yes, it is possible and correct to have a buffer extend
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57)  * beyond the first page.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) static inline void __dma_sync_page_highmem(struct page *page,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 		unsigned long offset, size_t size, int direction)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	size_t seg_size = min((size_t)(PAGE_SIZE - offset), size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	size_t cur_size = seg_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	unsigned long flags, start, seg_offset = offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	int nr_segs = 1 + ((size - seg_size) + PAGE_SIZE - 1)/PAGE_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	int seg_nr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	local_irq_save(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 		start = (unsigned long)kmap_atomic(page + seg_nr) + seg_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 		/* Sync this buffer segment */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 		__dma_sync((void *)start, seg_size, direction);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 		kunmap_atomic((void *)start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 		seg_nr++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 		/* Calculate next buffer segment size */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 		seg_size = min((size_t)PAGE_SIZE, size - cur_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 		/* Add the segment size to our running total */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 		cur_size += seg_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 		seg_offset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	} while (seg_nr < nr_segs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) #endif /* CONFIG_HIGHMEM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91)  * __dma_sync_page makes memory consistent. identical to __dma_sync, but
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92)  * takes a struct page instead of a virtual address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) static void __dma_sync_page(phys_addr_t paddr, size_t size, int dir)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	struct page *page = pfn_to_page(paddr >> PAGE_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	unsigned offset = paddr & ~PAGE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) #ifdef CONFIG_HIGHMEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	__dma_sync_page_highmem(page, offset, size, dir);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	unsigned long start = (unsigned long)page_address(page) + offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	__dma_sync((void *)start, size, dir);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 		enum dma_data_direction dir)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	__dma_sync_page(paddr, size, dir);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 		enum dma_data_direction dir)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	__dma_sync_page(paddr, size, dir);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) void arch_dma_prep_coherent(struct page *page, size_t size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	unsigned long kaddr = (unsigned long)page_address(page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	flush_dcache_range(kaddr, kaddr + size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) }