Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

3 Commits   0 Branches   0 Tags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  * String handling functions for PowerPC32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  * Copyright (C) 1996 Paul Mackerras.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <asm/ppc_asm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <asm/export.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <asm/cache.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 	.text
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) CACHELINE_BYTES = L1_CACHE_BYTES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) LG_CACHELINE_BYTES = L1_CACHE_SHIFT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) CACHELINE_MASK = (L1_CACHE_BYTES-1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) _GLOBAL(__arch_clear_user)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)  * Use dcbz on the complete cache lines in the destination
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)  * to set them to zero.  This requires that the destination
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)  * area is cacheable.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	cmplwi	cr0, r4, 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	mr	r10, r3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	li	r3, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	blt	7f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 11:	stw	r3, 0(r10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	beqlr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	andi.	r0, r10, 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	add	r11, r0, r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	subf	r6, r0, r10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	clrlwi	r7, r6, 32 - LG_CACHELINE_BYTES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	add	r8, r7, r11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	srwi	r9, r8, LG_CACHELINE_BYTES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	addic.	r9, r9, -1	/* total number of complete cachelines */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	ble	2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	xori	r0, r7, CACHELINE_MASK & ~3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	srwi.	r0, r0, 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 	beq	3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 	mtctr	r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 4:	stwu	r3, 4(r6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 	bdnz	4b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 3:	mtctr	r9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 	li	r7, 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 10:	dcbz	r7, r6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 	addi	r6, r6, CACHELINE_BYTES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 	bdnz	10b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 	clrlwi	r11, r8, 32 - LG_CACHELINE_BYTES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 	addi	r11, r11, 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 2:	srwi	r0 ,r11 ,2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 	mtctr	r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 	bdz	6f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 1:	stwu	r3, 4(r6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 	bdnz	1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 6:	andi.	r11, r11, 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 	beqlr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 	mtctr	r11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 	addi	r6, r6, 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 8:	stbu	r3, 1(r6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) 	bdnz	8b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 	blr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 7:	cmpwi	cr0, r4, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) 	beqlr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 	mtctr	r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) 	addi	r6, r10, -1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) 9:	stbu	r3, 1(r6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) 	bdnz	9b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) 	blr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) 90:	mr	r3, r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) 	blr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) 91:	add	r3, r10, r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) 	subf	r3, r6, r3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) 	blr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) 	EX_TABLE(11b, 90b)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) 	EX_TABLE(4b, 91b)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) 	EX_TABLE(10b, 91b)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) 	EX_TABLE(1b, 91b)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) 	EX_TABLE(8b, 91b)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) 	EX_TABLE(9b, 91b)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) EXPORT_SYMBOL(__arch_clear_user)