^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2002 Paul Mackerras, IBM Corp.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) #include <asm/processor.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <asm/ppc_asm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <asm/export.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <asm/asm-compat.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <asm/feature-fixups.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <asm/kasan.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #ifndef SELFTEST_CASE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) /* For big-endian, 0 == most CPUs, 1 == POWER6, 2 == Cell */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define SELFTEST_CASE 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) .align 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) _GLOBAL_TOC_KASAN(memcpy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) BEGIN_FTR_SECTION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #ifdef __LITTLE_ENDIAN__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) cmpdi cr7,r5,0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) std r3,-STACKFRAMESIZE+STK_REG(R31)(r1) /* save destination pointer for return value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) FTR_SECTION_ELSE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #ifdef CONFIG_PPC_BOOK3S_64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) b memcpy_power7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) ALT_FTR_SECTION_END_IFCLR(CPU_FTR_VMX_COPY)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #ifdef __LITTLE_ENDIAN__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) /* dumb little-endian memcpy that will get replaced at runtime */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) addi r9,r3,-1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) addi r4,r4,-1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) beqlr cr7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) mtctr r5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 1: lbzu r10,1(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) stbu r10,1(r9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) bdnz 1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) blr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) PPC_MTOCRF(0x01,r5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) cmpldi cr1,r5,16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) neg r6,r3 # LS 3 bits = # bytes to 8-byte dest bdry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) andi. r6,r6,7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) dcbt 0,r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) blt cr1,.Lshort_copy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) /* Below we want to nop out the bne if we're on a CPU that has the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) CPU_FTR_UNALIGNED_LD_STD bit set and the CPU_FTR_CP_USE_DCBTZ bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) cleared.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) At the time of writing the only CPU that has this combination of bits
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) set is Power6. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) test_feature = (SELFTEST_CASE == 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) BEGIN_FTR_SECTION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) FTR_SECTION_ELSE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) bne .Ldst_unaligned
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) ALT_FTR_SECTION_END(CPU_FTR_UNALIGNED_LD_STD | CPU_FTR_CP_USE_DCBTZ, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) CPU_FTR_UNALIGNED_LD_STD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) .Ldst_aligned:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) addi r3,r3,-16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) test_feature = (SELFTEST_CASE == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) BEGIN_FTR_SECTION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) andi. r0,r4,7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) bne .Lsrc_unaligned
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) END_FTR_SECTION_IFCLR(CPU_FTR_UNALIGNED_LD_STD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) srdi r7,r5,4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) ld r9,0(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) addi r4,r4,-8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) mtctr r7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) andi. r5,r5,7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) bf cr7*4+0,2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) addi r3,r3,8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) addi r4,r4,8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) mr r8,r9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) blt cr1,3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) 1: ld r9,8(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) std r8,8(r3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) 2: ldu r8,16(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) stdu r9,16(r3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) bdnz 1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) 3: std r8,8(r3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) beq 3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) addi r3,r3,16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) .Ldo_tail:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) bf cr7*4+1,1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) lwz r9,8(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) addi r4,r4,4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) stw r9,0(r3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) addi r3,r3,4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) 1: bf cr7*4+2,2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) lhz r9,8(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) addi r4,r4,2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) sth r9,0(r3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) addi r3,r3,2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) 2: bf cr7*4+3,3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) lbz r9,8(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) stb r9,0(r3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) 3: ld r3,-STACKFRAMESIZE+STK_REG(R31)(r1) /* return dest pointer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) blr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) .Lsrc_unaligned:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) srdi r6,r5,3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) addi r5,r5,-16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) subf r4,r0,r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) srdi r7,r5,4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) sldi r10,r0,3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) cmpdi cr6,r6,3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) andi. r5,r5,7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) mtctr r7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) subfic r11,r10,64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) add r5,r5,r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) bt cr7*4+0,0f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) ld r9,0(r4) # 3+2n loads, 2+2n stores
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) ld r0,8(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) sld r6,r9,r10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) ldu r9,16(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) srd r7,r0,r11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) sld r8,r0,r10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) or r7,r7,r6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) blt cr6,4f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) ld r0,8(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) # s1<< in r8, d0=(s0<<|s1>>) in r7, s3 in r0, s2 in r9, nix in r6 & r12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) b 2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 0: ld r0,0(r4) # 4+2n loads, 3+2n stores
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) ldu r9,8(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) sld r8,r0,r10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) addi r3,r3,-8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) blt cr6,5f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) ld r0,8(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) srd r12,r9,r11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) sld r6,r9,r10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) ldu r9,16(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) or r12,r8,r12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) srd r7,r0,r11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) sld r8,r0,r10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) addi r3,r3,16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) beq cr6,3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) # d0=(s0<<|s1>>) in r12, s1<< in r6, s2>> in r7, s2<< in r8, s3 in r9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 1: or r7,r7,r6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) ld r0,8(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) std r12,8(r3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 2: srd r12,r9,r11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) sld r6,r9,r10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) ldu r9,16(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) or r12,r8,r12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) stdu r7,16(r3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) srd r7,r0,r11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) sld r8,r0,r10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) bdnz 1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 3: std r12,8(r3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) or r7,r7,r6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 4: std r7,16(r3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 5: srd r12,r9,r11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) or r12,r8,r12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) std r12,24(r3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) beq 4f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) cmpwi cr1,r5,8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) addi r3,r3,32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) sld r9,r9,r10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) ble cr1,6f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) ld r0,8(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) srd r7,r0,r11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) or r9,r7,r9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 6:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) bf cr7*4+1,1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) rotldi r9,r9,32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) stw r9,0(r3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) addi r3,r3,4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 1: bf cr7*4+2,2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) rotldi r9,r9,16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) sth r9,0(r3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) addi r3,r3,2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 2: bf cr7*4+3,3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) rotldi r9,r9,8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) stb r9,0(r3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 3: ld r3,-STACKFRAMESIZE+STK_REG(R31)(r1) /* return dest pointer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) blr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) .Ldst_unaligned:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) PPC_MTOCRF(0x01,r6) # put #bytes to 8B bdry into cr7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) subf r5,r6,r5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) li r7,0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) cmpldi cr1,r5,16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) bf cr7*4+3,1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) lbz r0,0(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) stb r0,0(r3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) addi r7,r7,1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 1: bf cr7*4+2,2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) lhzx r0,r7,r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) sthx r0,r7,r3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) addi r7,r7,2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 2: bf cr7*4+1,3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) lwzx r0,r7,r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) stwx r0,r7,r3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 3: PPC_MTOCRF(0x01,r5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) add r4,r6,r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) add r3,r6,r3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) b .Ldst_aligned
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) .Lshort_copy:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) bf cr7*4+0,1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) lwz r0,0(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) lwz r9,4(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) addi r4,r4,8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) stw r0,0(r3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) stw r9,4(r3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) addi r3,r3,8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 1: bf cr7*4+1,2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) lwz r0,0(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) addi r4,r4,4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) stw r0,0(r3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) addi r3,r3,4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 2: bf cr7*4+2,3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) lhz r0,0(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) addi r4,r4,2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) sth r0,0(r3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) addi r3,r3,2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 3: bf cr7*4+3,4f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) lbz r0,0(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) stb r0,0(r3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 4: ld r3,-STACKFRAMESIZE+STK_REG(R31)(r1) /* return dest pointer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) blr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) EXPORT_SYMBOL(memcpy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) EXPORT_SYMBOL_KASAN(memcpy)