Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Copyright (C) 2002 Paul Mackerras, IBM Corp.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) #include <asm/processor.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) #include <asm/ppc_asm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) #include <asm/export.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <asm/asm-compat.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <asm/feature-fixups.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #ifndef SELFTEST_CASE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) /* 0 == most CPUs, 1 == POWER6, 2 == Cell */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #define SELFTEST_CASE	0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #ifdef __BIG_ENDIAN__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #define sLd sld		/* Shift towards low-numbered address. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #define sHd srd		/* Shift towards high-numbered address. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #define sLd srd		/* Shift towards low-numbered address. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #define sHd sld		/* Shift towards high-numbered address. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25)  * These macros are used to generate exception table entries.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26)  * The exception handlers below use the original arguments
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27)  * (stored on the stack) and the point where we're up to in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28)  * the destination buffer, i.e. the address of the first
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29)  * unmodified byte.  Generally r3 points into the destination
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30)  * buffer, but the first unmodified byte is at a variable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31)  * offset from r3.  In the code below, the symbol r3_offset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32)  * is set to indicate the current offset at each point in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33)  * the code.  This offset is then used as a negative offset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34)  * from the exception handler code, and those instructions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35)  * before the exception handlers are addi instructions that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36)  * adjust r3 to point to the correct place.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	.macro	lex		/* exception handler for load */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 100:	EX_TABLE(100b, .Lld_exc - r3_offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	.endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	.macro	stex		/* exception handler for store */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 100:	EX_TABLE(100b, .Lst_exc - r3_offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	.endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	.align	7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) _GLOBAL_TOC(__copy_tofrom_user)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) #ifdef CONFIG_PPC_BOOK3S_64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) BEGIN_FTR_SECTION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) FTR_SECTION_ELSE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	b	__copy_tofrom_user_power7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) ALT_FTR_SECTION_END_IFCLR(CPU_FTR_VMX_COPY)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) _GLOBAL(__copy_tofrom_user_base)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	/* first check for a 4kB copy on a 4kB boundary */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	cmpldi	cr1,r5,16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	cmpdi	cr6,r5,4096
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	or	r0,r3,r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	neg	r6,r3		/* LS 3 bits = # bytes to 8-byte dest bdry */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	andi.	r0,r0,4095
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	std	r3,-24(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	crand	cr0*4+2,cr0*4+2,cr6*4+2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	std	r4,-16(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	std	r5,-8(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	dcbt	0,r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	beq	.Lcopy_page_4K
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	andi.	r6,r6,7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	PPC_MTOCRF(0x01,r5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	blt	cr1,.Lshort_copy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) /* Below we want to nop out the bne if we're on a CPU that has the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72)  * CPU_FTR_UNALIGNED_LD_STD bit set and the CPU_FTR_CP_USE_DCBTZ bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73)  * cleared.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74)  * At the time of writing the only CPU that has this combination of bits
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75)  * set is Power6.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) test_feature = (SELFTEST_CASE == 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) BEGIN_FTR_SECTION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) FTR_SECTION_ELSE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	bne	.Ldst_unaligned
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) ALT_FTR_SECTION_END(CPU_FTR_UNALIGNED_LD_STD | CPU_FTR_CP_USE_DCBTZ, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 		    CPU_FTR_UNALIGNED_LD_STD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) .Ldst_aligned:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	addi	r3,r3,-16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) r3_offset = 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) test_feature = (SELFTEST_CASE == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) BEGIN_FTR_SECTION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	andi.	r0,r4,7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	bne	.Lsrc_unaligned
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) END_FTR_SECTION_IFCLR(CPU_FTR_UNALIGNED_LD_STD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	blt	cr1,.Ldo_tail		/* if < 16 bytes to copy */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	srdi	r0,r5,5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	cmpdi	cr1,r0,0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) lex;	ld	r7,0(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) lex;	ld	r6,8(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	addi	r4,r4,16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	mtctr	r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	andi.	r0,r5,0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	beq	22f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	addi	r3,r3,16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) r3_offset = 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	addi	r4,r4,-16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	mr	r9,r7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	mr	r8,r6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	beq	cr1,72f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 21:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) lex;	ld	r7,16(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) lex;	ld	r6,24(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	addi	r4,r4,32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) stex;	std	r9,0(r3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) r3_offset = 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) stex;	std	r8,8(r3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) r3_offset = 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 22:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) lex;	ld	r9,0(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) lex;	ld	r8,8(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) stex;	std	r7,16(r3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) r3_offset = 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) stex;	std	r6,24(r3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	addi	r3,r3,32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) r3_offset = 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	bdnz	21b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 72:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) stex;	std	r9,0(r3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) r3_offset = 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) stex;	std	r8,8(r3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) r3_offset = 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	andi.	r5,r5,0xf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	beq+	3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	addi	r4,r4,16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) .Ldo_tail:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	addi	r3,r3,16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) r3_offset = 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	bf	cr7*4+0,246f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) lex;	ld	r9,0(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	addi	r4,r4,8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) stex;	std	r9,0(r3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	addi	r3,r3,8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 246:	bf	cr7*4+1,1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) lex;	lwz	r9,0(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	addi	r4,r4,4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) stex;	stw	r9,0(r3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	addi	r3,r3,4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 1:	bf	cr7*4+2,2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) lex;	lhz	r9,0(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	addi	r4,r4,2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) stex;	sth	r9,0(r3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	addi	r3,r3,2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 2:	bf	cr7*4+3,3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) lex;	lbz	r9,0(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) stex;	stb	r9,0(r3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 3:	li	r3,0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	blr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) .Lsrc_unaligned:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) r3_offset = 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	srdi	r6,r5,3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	addi	r5,r5,-16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	subf	r4,r0,r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	srdi	r7,r5,4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	sldi	r10,r0,3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	cmpldi	cr6,r6,3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	andi.	r5,r5,7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	mtctr	r7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	subfic	r11,r10,64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	add	r5,r5,r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	bt	cr7*4+0,28f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) lex;	ld	r9,0(r4)	/* 3+2n loads, 2+2n stores */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) lex;	ld	r0,8(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	sLd	r6,r9,r10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) lex;	ldu	r9,16(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	sHd	r7,r0,r11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	sLd	r8,r0,r10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	or	r7,r7,r6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	blt	cr6,79f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) lex;	ld	r0,8(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	b	2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 28:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) lex;	ld	r0,0(r4)	/* 4+2n loads, 3+2n stores */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) lex;	ldu	r9,8(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	sLd	r8,r0,r10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	addi	r3,r3,-8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) r3_offset = 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	blt	cr6,5f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) lex;	ld	r0,8(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	sHd	r12,r9,r11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	sLd	r6,r9,r10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) lex;	ldu	r9,16(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	or	r12,r8,r12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	sHd	r7,r0,r11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	sLd	r8,r0,r10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	addi	r3,r3,16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) r3_offset = 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	beq	cr6,78f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 1:	or	r7,r7,r6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) lex;	ld	r0,8(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) stex;	std	r12,8(r3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) r3_offset = 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 2:	sHd	r12,r9,r11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	sLd	r6,r9,r10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) lex;	ldu	r9,16(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	or	r12,r8,r12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) stex;	stdu	r7,16(r3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) r3_offset = 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	sHd	r7,r0,r11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	sLd	r8,r0,r10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	bdnz	1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 78:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) stex;	std	r12,8(r3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) r3_offset = 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	or	r7,r7,r6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 79:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) stex;	std	r7,16(r3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) r3_offset = 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 5:	sHd	r12,r9,r11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	or	r12,r8,r12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) stex;	std	r12,24(r3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) r3_offset = 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	bne	6f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	li	r3,0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	blr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 6:	cmpwi	cr1,r5,8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	addi	r3,r3,32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) r3_offset = 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	sLd	r9,r9,r10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	ble	cr1,7f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) lex;	ld	r0,8(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	sHd	r7,r0,r11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	or	r9,r7,r9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 7:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	bf	cr7*4+1,1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) #ifdef __BIG_ENDIAN__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	rotldi	r9,r9,32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) stex;	stw	r9,0(r3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) #ifdef __LITTLE_ENDIAN__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	rotrdi	r9,r9,32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	addi	r3,r3,4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 1:	bf	cr7*4+2,2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) #ifdef __BIG_ENDIAN__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	rotldi	r9,r9,16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) stex;	sth	r9,0(r3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) #ifdef __LITTLE_ENDIAN__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	rotrdi	r9,r9,16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	addi	r3,r3,2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 2:	bf	cr7*4+3,3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) #ifdef __BIG_ENDIAN__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	rotldi	r9,r9,8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) stex;	stb	r9,0(r3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) #ifdef __LITTLE_ENDIAN__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	rotrdi	r9,r9,8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 3:	li	r3,0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	blr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) .Ldst_unaligned:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) r3_offset = 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	PPC_MTOCRF(0x01,r6)		/* put #bytes to 8B bdry into cr7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	subf	r5,r6,r5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	li	r7,0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	cmpldi	cr1,r5,16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	bf	cr7*4+3,1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 100:	EX_TABLE(100b, .Lld_exc_r7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	lbz	r0,0(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 100:	EX_TABLE(100b, .Lst_exc_r7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	stb	r0,0(r3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	addi	r7,r7,1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 1:	bf	cr7*4+2,2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 100:	EX_TABLE(100b, .Lld_exc_r7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	lhzx	r0,r7,r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 100:	EX_TABLE(100b, .Lst_exc_r7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	sthx	r0,r7,r3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	addi	r7,r7,2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 2:	bf	cr7*4+1,3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 100:	EX_TABLE(100b, .Lld_exc_r7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	lwzx	r0,r7,r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 100:	EX_TABLE(100b, .Lst_exc_r7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 	stwx	r0,r7,r3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 3:	PPC_MTOCRF(0x01,r5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	add	r4,r6,r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 	add	r3,r6,r3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 	b	.Ldst_aligned
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) .Lshort_copy:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) r3_offset = 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	bf	cr7*4+0,1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) lex;	lwz	r0,0(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) lex;	lwz	r9,4(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	addi	r4,r4,8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) stex;	stw	r0,0(r3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) stex;	stw	r9,4(r3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	addi	r3,r3,8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 1:	bf	cr7*4+1,2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) lex;	lwz	r0,0(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 	addi	r4,r4,4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) stex;	stw	r0,0(r3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	addi	r3,r3,4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 2:	bf	cr7*4+2,3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) lex;	lhz	r0,0(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	addi	r4,r4,2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) stex;	sth	r0,0(r3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	addi	r3,r3,2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 3:	bf	cr7*4+3,4f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) lex;	lbz	r0,0(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) stex;	stb	r0,0(r3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 4:	li	r3,0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 	blr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)  * exception handlers follow
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320)  * we have to return the number of bytes not copied
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321)  * for an exception on a load, we set the rest of the destination to 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322)  * Note that the number of bytes of instructions for adjusting r3 needs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)  * to equal the amount of the adjustment, due to the trick of using
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324)  * .Lld_exc - r3_offset as the handler address.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) .Lld_exc_r7:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 	add	r3,r3,r7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 	b	.Lld_exc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	/* adjust by 24 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 	addi	r3,r3,8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 	/* adjust by 16 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 	addi	r3,r3,8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 	nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 	/* adjust by 8 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 	addi	r3,r3,8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 	nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)  * Here we have had a fault on a load and r3 points to the first
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343)  * unmodified byte of the destination.  We use the original arguments
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344)  * and r3 to work out how much wasn't copied.  Since we load some
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345)  * distance ahead of the stores, we continue copying byte-by-byte until
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346)  * we hit the load fault again in order to copy as much as possible.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) .Lld_exc:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 	ld	r6,-24(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 	ld	r4,-16(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 	ld	r5,-8(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 	subf	r6,r6,r3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 	add	r4,r4,r6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 	subf	r5,r6,r5	/* #bytes left to go */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357)  * first see if we can copy any more bytes before hitting another exception
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 	mtctr	r5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) r3_offset = 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 100:	EX_TABLE(100b, .Ldone)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 43:	lbz	r0,0(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 	addi	r4,r4,1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) stex;	stb	r0,0(r3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 	addi	r3,r3,1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 	bdnz	43b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 	li	r3,0		/* huh? all copied successfully this time? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 	blr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371)  * here we have trapped again, amount remaining is in ctr.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) .Ldone:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 	mfctr	r3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 	blr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378)  * exception handlers for stores: we need to work out how many bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379)  * weren't copied, and we may need to copy some more.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380)  * Note that the number of bytes of instructions for adjusting r3 needs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381)  * to equal the amount of the adjustment, due to the trick of using
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382)  * .Lst_exc - r3_offset as the handler address.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) .Lst_exc_r7:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 	add	r3,r3,r7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 	b	.Lst_exc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 	/* adjust by 24 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 	addi	r3,r3,8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 	nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 	/* adjust by 16 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 	addi	r3,r3,8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 	nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 	/* adjust by 8 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 	addi	r3,r3,4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 	/* adjust by 4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 	addi	r3,r3,4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) .Lst_exc:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 	ld	r6,-24(r1)	/* original destination pointer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 	ld	r4,-16(r1)	/* original source pointer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 	ld	r5,-8(r1)	/* original number of bytes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 	add	r7,r6,r5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 	 * If the destination pointer isn't 8-byte aligned,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 	 * we may have got the exception as a result of a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 	 * store that overlapped a page boundary, so we may be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 	 * able to copy a few more bytes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 17:	andi.	r0,r3,7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 	beq	19f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 	subf	r8,r6,r3	/* #bytes copied */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 100:	EX_TABLE(100b,19f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 	lbzx	r0,r8,r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 100:	EX_TABLE(100b,19f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) 	stb	r0,0(r3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) 	addi	r3,r3,1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) 	cmpld	r3,r7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) 	blt	17b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) 19:	subf	r3,r3,r7	/* #bytes not copied in r3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) 	blr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423)  * Routine to copy a whole page of data, optimized for POWER4.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424)  * On POWER4 it is more than 50% faster than the simple loop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425)  * above (following the .Ldst_aligned label).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) 	.macro	exc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) 100:	EX_TABLE(100b, .Labort)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) 	.endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) .Lcopy_page_4K:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) 	std	r31,-32(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) 	std	r30,-40(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) 	std	r29,-48(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) 	std	r28,-56(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) 	std	r27,-64(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) 	std	r26,-72(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) 	std	r25,-80(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) 	std	r24,-88(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) 	std	r23,-96(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) 	std	r22,-104(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) 	std	r21,-112(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) 	std	r20,-120(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) 	li	r5,4096/32 - 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) 	addi	r3,r3,-8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) 	li	r0,5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) 0:	addi	r5,r5,-24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) 	mtctr	r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) exc;	ld	r22,640(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) exc;	ld	r21,512(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) exc;	ld	r20,384(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) exc;	ld	r11,256(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) exc;	ld	r9,128(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) exc;	ld	r7,0(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) exc;	ld	r25,648(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) exc;	ld	r24,520(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) exc;	ld	r23,392(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) exc;	ld	r10,264(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) exc;	ld	r8,136(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) exc;	ldu	r6,8(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) 	cmpwi	r5,24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) exc;	std	r22,648(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) exc;	std	r21,520(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) exc;	std	r20,392(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) exc;	std	r11,264(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) exc;	std	r9,136(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) exc;	std	r7,8(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) exc;	ld	r28,648(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) exc;	ld	r27,520(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) exc;	ld	r26,392(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) exc;	ld	r31,264(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) exc;	ld	r30,136(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) exc;	ld	r29,8(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) exc;	std	r25,656(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) exc;	std	r24,528(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) exc;	std	r23,400(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) exc;	std	r10,272(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) exc;	std	r8,144(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) exc;	std	r6,16(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) exc;	ld	r22,656(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) exc;	ld	r21,528(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) exc;	ld	r20,400(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) exc;	ld	r11,272(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) exc;	ld	r9,144(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) exc;	ld	r7,16(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) exc;	std	r28,664(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) exc;	std	r27,536(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) exc;	std	r26,408(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) exc;	std	r31,280(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) exc;	std	r30,152(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) exc;	stdu	r29,24(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) exc;	ld	r25,664(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) exc;	ld	r24,536(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) exc;	ld	r23,408(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) exc;	ld	r10,280(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) exc;	ld	r8,152(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) exc;	ldu	r6,24(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) 	bdnz	1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) exc;	std	r22,648(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) exc;	std	r21,520(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) exc;	std	r20,392(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) exc;	std	r11,264(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) exc;	std	r9,136(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) exc;	std	r7,8(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) 	addi	r4,r4,640
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) 	addi	r3,r3,648
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) 	bge	0b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) 	mtctr	r5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) exc;	ld	r7,0(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) exc;	ld	r8,8(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) exc;	ldu	r9,16(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) exc;	ld	r10,8(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) exc;	std	r7,8(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) exc;	ld	r7,16(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) exc;	std	r8,16(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) exc;	ld	r8,24(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) exc;	std	r9,24(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) exc;	ldu	r9,32(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) exc;	stdu	r10,32(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) 	bdnz	3b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) 4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) exc;	ld	r10,8(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) exc;	std	r7,8(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) exc;	std	r8,16(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) exc;	std	r9,24(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) exc;	std	r10,32(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) 9:	ld	r20,-120(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) 	ld	r21,-112(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) 	ld	r22,-104(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) 	ld	r23,-96(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) 	ld	r24,-88(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) 	ld	r25,-80(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) 	ld	r26,-72(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) 	ld	r27,-64(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) 	ld	r28,-56(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) 	ld	r29,-48(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) 	ld	r30,-40(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) 	ld	r31,-32(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) 	li	r3,0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) 	blr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544)  * on an exception, reset to the beginning and jump back into the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545)  * standard __copy_tofrom_user
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) .Labort:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) 	ld	r20,-120(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) 	ld	r21,-112(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) 	ld	r22,-104(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) 	ld	r23,-96(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) 	ld	r24,-88(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) 	ld	r25,-80(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) 	ld	r26,-72(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) 	ld	r27,-64(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) 	ld	r28,-56(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) 	ld	r29,-48(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) 	ld	r30,-40(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) 	ld	r31,-32(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) 	ld	r3,-24(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) 	ld	r4,-16(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) 	li	r5,4096
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) 	b	.Ldst_aligned
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) EXPORT_SYMBOL(__copy_tofrom_user)