^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Author: Yu Liu, <yu.liu@freescale.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * This file is derived from arch/powerpc/kvm/44x_emulate.c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * by Hollis Blanchard <hollisb@us.ibm.com>.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <asm/kvm_ppc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <asm/disassemble.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <asm/dbell.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <asm/reg_booke.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include "booke.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include "e500.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define XOP_DCBTLS 166
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define XOP_MSGSND 206
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define XOP_MSGCLR 238
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define XOP_MFTMR 366
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define XOP_TLBIVAX 786
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define XOP_TLBSX 914
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define XOP_TLBRE 946
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define XOP_TLBWE 978
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define XOP_TLBILX 18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define XOP_EHPRIV 270
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #ifdef CONFIG_KVM_E500MC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) static int dbell2prio(ulong param)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) int msg = param & PPC_DBELL_TYPE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) int prio = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) switch (msg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) case PPC_DBELL_TYPE(PPC_DBELL):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) prio = BOOKE_IRQPRIO_DBELL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) case PPC_DBELL_TYPE(PPC_DBELL_CRIT):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) prio = BOOKE_IRQPRIO_DBELL_CRIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) return prio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) static int kvmppc_e500_emul_msgclr(struct kvm_vcpu *vcpu, int rb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) ulong param = vcpu->arch.regs.gpr[rb];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) int prio = dbell2prio(param);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) if (prio < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) return EMULATE_FAIL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) clear_bit(prio, &vcpu->arch.pending_exceptions);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) return EMULATE_DONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) static int kvmppc_e500_emul_msgsnd(struct kvm_vcpu *vcpu, int rb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) ulong param = vcpu->arch.regs.gpr[rb];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) int prio = dbell2prio(rb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) int pir = param & PPC_DBELL_PIR_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) struct kvm_vcpu *cvcpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) if (prio < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) return EMULATE_FAIL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) kvm_for_each_vcpu(i, cvcpu, vcpu->kvm) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) int cpir = cvcpu->arch.shared->pir;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) if ((param & PPC_DBELL_MSG_BRDCAST) || (cpir == pir)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) set_bit(prio, &cvcpu->arch.pending_exceptions);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) kvm_vcpu_kick(cvcpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) return EMULATE_DONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) static int kvmppc_e500_emul_ehpriv(struct kvm_vcpu *vcpu,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) unsigned int inst, int *advance)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) int emulated = EMULATE_DONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) switch (get_oc(inst)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) case EHPRIV_OC_DEBUG:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) vcpu->run->exit_reason = KVM_EXIT_DEBUG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) vcpu->run->debug.arch.address = vcpu->arch.regs.nip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) vcpu->run->debug.arch.status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) kvmppc_account_exit(vcpu, DEBUG_EXITS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) emulated = EMULATE_EXIT_USER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) *advance = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) emulated = EMULATE_FAIL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) return emulated;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) static int kvmppc_e500_emul_dcbtls(struct kvm_vcpu *vcpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) /* Always fail to lock the cache */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) vcpu_e500->l1csr0 |= L1CSR0_CUL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) return EMULATE_DONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) static int kvmppc_e500_emul_mftmr(struct kvm_vcpu *vcpu, unsigned int inst,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) int rt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) /* Expose one thread per vcpu */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) if (get_tmrn(inst) == TMRN_TMCFG0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) kvmppc_set_gpr(vcpu, rt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 1 | (1 << TMRN_TMCFG0_NATHRD_SHIFT));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) return EMULATE_DONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) return EMULATE_FAIL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) int kvmppc_core_emulate_op_e500(struct kvm_vcpu *vcpu,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) unsigned int inst, int *advance)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) int emulated = EMULATE_DONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) int ra = get_ra(inst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) int rb = get_rb(inst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) int rt = get_rt(inst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) gva_t ea;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) switch (get_op(inst)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) case 31:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) switch (get_xop(inst)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) case XOP_DCBTLS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) emulated = kvmppc_e500_emul_dcbtls(vcpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) #ifdef CONFIG_KVM_E500MC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) case XOP_MSGSND:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) emulated = kvmppc_e500_emul_msgsnd(vcpu, rb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) case XOP_MSGCLR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) emulated = kvmppc_e500_emul_msgclr(vcpu, rb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) case XOP_TLBRE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) emulated = kvmppc_e500_emul_tlbre(vcpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) case XOP_TLBWE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) emulated = kvmppc_e500_emul_tlbwe(vcpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) case XOP_TLBSX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) ea = kvmppc_get_ea_indexed(vcpu, ra, rb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) emulated = kvmppc_e500_emul_tlbsx(vcpu, ea);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) case XOP_TLBILX: {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) int type = rt & 0x3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) ea = kvmppc_get_ea_indexed(vcpu, ra, rb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) emulated = kvmppc_e500_emul_tlbilx(vcpu, type, ea);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) case XOP_TLBIVAX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) ea = kvmppc_get_ea_indexed(vcpu, ra, rb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) emulated = kvmppc_e500_emul_tlbivax(vcpu, ea);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) case XOP_MFTMR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) emulated = kvmppc_e500_emul_mftmr(vcpu, inst, rt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) case XOP_EHPRIV:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) emulated = kvmppc_e500_emul_ehpriv(vcpu, inst, advance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) emulated = EMULATE_FAIL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) emulated = EMULATE_FAIL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) if (emulated == EMULATE_FAIL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) emulated = kvmppc_booke_emulate_op(vcpu, inst, advance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) return emulated;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) int kvmppc_core_emulate_mtspr_e500(struct kvm_vcpu *vcpu, int sprn, ulong spr_val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) int emulated = EMULATE_DONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) switch (sprn) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) #ifndef CONFIG_KVM_BOOKE_HV
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) case SPRN_PID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) kvmppc_set_pid(vcpu, spr_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) case SPRN_PID1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) if (spr_val != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) return EMULATE_FAIL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) vcpu_e500->pid[1] = spr_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) case SPRN_PID2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) if (spr_val != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) return EMULATE_FAIL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) vcpu_e500->pid[2] = spr_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) case SPRN_MAS0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) vcpu->arch.shared->mas0 = spr_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) case SPRN_MAS1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) vcpu->arch.shared->mas1 = spr_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) case SPRN_MAS2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) vcpu->arch.shared->mas2 = spr_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) case SPRN_MAS3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) vcpu->arch.shared->mas7_3 &= ~(u64)0xffffffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) vcpu->arch.shared->mas7_3 |= spr_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) case SPRN_MAS4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) vcpu->arch.shared->mas4 = spr_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) case SPRN_MAS6:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) vcpu->arch.shared->mas6 = spr_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) case SPRN_MAS7:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) vcpu->arch.shared->mas7_3 &= (u64)0xffffffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) vcpu->arch.shared->mas7_3 |= (u64)spr_val << 32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) case SPRN_L1CSR0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) vcpu_e500->l1csr0 = spr_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) vcpu_e500->l1csr0 &= ~(L1CSR0_DCFI | L1CSR0_CLFC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) case SPRN_L1CSR1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) vcpu_e500->l1csr1 = spr_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) vcpu_e500->l1csr1 &= ~(L1CSR1_ICFI | L1CSR1_ICLFR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) case SPRN_HID0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) vcpu_e500->hid0 = spr_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) case SPRN_HID1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) vcpu_e500->hid1 = spr_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) case SPRN_MMUCSR0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) emulated = kvmppc_e500_emul_mt_mmucsr0(vcpu_e500,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) spr_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) case SPRN_PWRMGTCR0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) * Guest relies on host power management configurations
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) * Treat the request as a general store
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) vcpu->arch.pwrmgtcr0 = spr_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) case SPRN_BUCSR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) * If we are here, it means that we have already flushed the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) * branch predictor, so just return to guest.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) /* extra exceptions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) #ifdef CONFIG_SPE_POSSIBLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) case SPRN_IVOR32:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL] = spr_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) case SPRN_IVOR33:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA] = spr_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) case SPRN_IVOR34:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND] = spr_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) #ifdef CONFIG_ALTIVEC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) case SPRN_IVOR32:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) vcpu->arch.ivor[BOOKE_IRQPRIO_ALTIVEC_UNAVAIL] = spr_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) case SPRN_IVOR33:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) vcpu->arch.ivor[BOOKE_IRQPRIO_ALTIVEC_ASSIST] = spr_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) case SPRN_IVOR35:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR] = spr_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) #ifdef CONFIG_KVM_BOOKE_HV
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) case SPRN_IVOR36:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL] = spr_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) case SPRN_IVOR37:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL_CRIT] = spr_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) emulated = kvmppc_booke_emulate_mtspr(vcpu, sprn, spr_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) return emulated;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) int kvmppc_core_emulate_mfspr_e500(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) int emulated = EMULATE_DONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) switch (sprn) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) #ifndef CONFIG_KVM_BOOKE_HV
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) case SPRN_PID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) *spr_val = vcpu_e500->pid[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) case SPRN_PID1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) *spr_val = vcpu_e500->pid[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) case SPRN_PID2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) *spr_val = vcpu_e500->pid[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) case SPRN_MAS0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) *spr_val = vcpu->arch.shared->mas0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) case SPRN_MAS1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) *spr_val = vcpu->arch.shared->mas1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) case SPRN_MAS2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) *spr_val = vcpu->arch.shared->mas2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) case SPRN_MAS3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) *spr_val = (u32)vcpu->arch.shared->mas7_3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) case SPRN_MAS4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) *spr_val = vcpu->arch.shared->mas4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) case SPRN_MAS6:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) *spr_val = vcpu->arch.shared->mas6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) case SPRN_MAS7:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) *spr_val = vcpu->arch.shared->mas7_3 >> 32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) case SPRN_DECAR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) *spr_val = vcpu->arch.decar;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) case SPRN_TLB0CFG:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) *spr_val = vcpu->arch.tlbcfg[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) case SPRN_TLB1CFG:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) *spr_val = vcpu->arch.tlbcfg[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) case SPRN_TLB0PS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) if (!has_feature(vcpu, VCPU_FTR_MMU_V2))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) return EMULATE_FAIL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) *spr_val = vcpu->arch.tlbps[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) case SPRN_TLB1PS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) if (!has_feature(vcpu, VCPU_FTR_MMU_V2))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) return EMULATE_FAIL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) *spr_val = vcpu->arch.tlbps[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) case SPRN_L1CSR0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) *spr_val = vcpu_e500->l1csr0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) case SPRN_L1CSR1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) *spr_val = vcpu_e500->l1csr1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) case SPRN_HID0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) *spr_val = vcpu_e500->hid0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) case SPRN_HID1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) *spr_val = vcpu_e500->hid1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) case SPRN_SVR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) *spr_val = vcpu_e500->svr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) case SPRN_MMUCSR0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) *spr_val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) case SPRN_MMUCFG:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) *spr_val = vcpu->arch.mmucfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) case SPRN_EPTCFG:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) if (!has_feature(vcpu, VCPU_FTR_MMU_V2))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) return EMULATE_FAIL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) * Legacy Linux guests access EPTCFG register even if the E.PT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) * category is disabled in the VM. Give them a chance to live.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) *spr_val = vcpu->arch.eptcfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) case SPRN_PWRMGTCR0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) *spr_val = vcpu->arch.pwrmgtcr0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) /* extra exceptions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) #ifdef CONFIG_SPE_POSSIBLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) case SPRN_IVOR32:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) case SPRN_IVOR33:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) case SPRN_IVOR34:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) #ifdef CONFIG_ALTIVEC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) case SPRN_IVOR32:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_ALTIVEC_UNAVAIL];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) case SPRN_IVOR33:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_ALTIVEC_ASSIST];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) case SPRN_IVOR35:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) #ifdef CONFIG_KVM_BOOKE_HV
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) case SPRN_IVOR36:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) case SPRN_IVOR37:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL_CRIT];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) emulated = kvmppc_booke_emulate_mfspr(vcpu, sprn, spr_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) return emulated;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452)
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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