Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * Author: Varun Sethi <varun.sethi@freescale.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Author: Scott Wood <scotwood@freescale.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * Author: Mihai Caraman <mihai.caraman@freescale.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  * This file is derived from arch/powerpc/kvm/booke_interrupts.S
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <asm/ppc_asm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <asm/kvm_asm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <asm/reg.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <asm/page.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <asm/asm-compat.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <asm/asm-offsets.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <asm/bitsperlong.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #ifdef CONFIG_64BIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <asm/exception-64e.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <asm/hw_irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include <asm/irqflags.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #include "../kernel/head_booke.h" /* for THREAD_NORMSAVE() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define LONGBYTES		(BITS_PER_LONG / 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define VCPU_GUEST_SPRG(n)	(VCPU_GUEST_SPRGS + (n * LONGBYTES))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) /* The host stack layout: */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define HOST_R1         0 /* Implied by stwu. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define HOST_CALLEE_LR  PPC_LR_STKOFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define HOST_RUN        (HOST_CALLEE_LR + LONGBYTES)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38)  * r2 is special: it holds 'current', and it made nonvolatile in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39)  * kernel with the -ffixed-r2 gcc option.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #define HOST_R2         (HOST_RUN + LONGBYTES)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) #define HOST_CR         (HOST_R2 + LONGBYTES)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) #define HOST_NV_GPRS    (HOST_CR + LONGBYTES)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) #define __HOST_NV_GPR(n)  (HOST_NV_GPRS + ((n - 14) * LONGBYTES))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) #define HOST_NV_GPR(n)  __HOST_NV_GPR(__REG_##n)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) #define HOST_MIN_STACK_SIZE (HOST_NV_GPR(R31) + LONGBYTES)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) #define HOST_STACK_SIZE ((HOST_MIN_STACK_SIZE + 15) & ~15) /* Align. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) /* LR in caller stack frame. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) #define HOST_STACK_LR	(HOST_STACK_SIZE + PPC_LR_STKOFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) #define NEED_EMU		0x00000001 /* emulation -- save nv regs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) #define NEED_DEAR		0x00000002 /* save faulting DEAR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) #define NEED_ESR		0x00000004 /* save faulting ESR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56)  * On entry:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57)  * r4 = vcpu, r5 = srr0, r6 = srr1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58)  * saved in vcpu: cr, ctr, r3-r13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) .macro kvm_handler_common intno, srr0, flags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	/* Restore host stack pointer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	PPC_STL	r1, VCPU_GPR(R1)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	PPC_STL	r2, VCPU_GPR(R2)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	PPC_LL	r1, VCPU_HOST_STACK(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	PPC_LL	r2, HOST_R2(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) START_BTB_FLUSH_SECTION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	BTB_FLUSH(r10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) END_BTB_FLUSH_SECTION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	mfspr	r10, SPRN_PID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	lwz	r8, VCPU_HOST_PID(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	PPC_LL	r11, VCPU_SHARED(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	PPC_STL	r14, VCPU_GPR(R14)(r4) /* We need a non-volatile GPR. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	li	r14, \intno
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	stw	r10, VCPU_GUEST_PID(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	mtspr	SPRN_PID, r8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) #ifdef CONFIG_KVM_EXIT_TIMING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	/* save exit time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 1:	mfspr	r7, SPRN_TBRU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	mfspr	r8, SPRN_TBRL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	mfspr	r9, SPRN_TBRU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	cmpw	r9, r7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	stw	r8, VCPU_TIMING_EXIT_TBL(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	bne-	1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	stw	r9, VCPU_TIMING_EXIT_TBU(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	oris	r8, r6, MSR_CE@h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	PPC_STD(r6, VCPU_SHARED_MSR, r11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	ori	r8, r8, MSR_ME | MSR_RI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	PPC_STL	r5, VCPU_PC(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	 * Make sure CE/ME/RI are set (if appropriate for exception type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	 * whether or not the guest had it set.  Since mfmsr/mtmsr are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	 * somewhat expensive, skip in the common case where the guest
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	 * had all these bits set (and thus they're still set if
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	 * appropriate for the exception type).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	cmpw	r6, r8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	beq	1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	mfmsr	r7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	.if	\srr0 != SPRN_MCSRR0 && \srr0 != SPRN_CSRR0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	oris	r7, r7, MSR_CE@h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	.endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	.if	\srr0 != SPRN_MCSRR0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	ori	r7, r7, MSR_ME | MSR_RI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	.endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	mtmsr	r7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	.if	\flags & NEED_EMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	PPC_STL	r15, VCPU_GPR(R15)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	PPC_STL	r16, VCPU_GPR(R16)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	PPC_STL	r17, VCPU_GPR(R17)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	PPC_STL	r18, VCPU_GPR(R18)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	PPC_STL	r19, VCPU_GPR(R19)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	PPC_STL	r20, VCPU_GPR(R20)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	PPC_STL	r21, VCPU_GPR(R21)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	PPC_STL	r22, VCPU_GPR(R22)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	PPC_STL	r23, VCPU_GPR(R23)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	PPC_STL	r24, VCPU_GPR(R24)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	PPC_STL	r25, VCPU_GPR(R25)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	PPC_STL	r26, VCPU_GPR(R26)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	PPC_STL	r27, VCPU_GPR(R27)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	PPC_STL	r28, VCPU_GPR(R28)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	PPC_STL	r29, VCPU_GPR(R29)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	PPC_STL	r30, VCPU_GPR(R30)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	PPC_STL	r31, VCPU_GPR(R31)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	 * We don't use external PID support. lwepx faults would need to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	 * handled by KVM and this implies aditional code in DO_KVM (for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	 * DTB_MISS, DSI and LRAT) to check ESR[EPID] and EPLC[EGS] which
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	 * is too intrusive for the host. Get last instuction in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	 * kvmppc_get_last_inst().
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	li	r9, KVM_INST_FETCH_FAILED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	stw	r9, VCPU_LAST_INST(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	.endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	.if	\flags & NEED_ESR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	mfspr	r8, SPRN_ESR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	PPC_STL	r8, VCPU_FAULT_ESR(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	.endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	.if	\flags & NEED_DEAR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	mfspr	r9, SPRN_DEAR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	PPC_STL	r9, VCPU_FAULT_DEAR(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	.endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	b	kvmppc_resume_host
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) #ifdef CONFIG_64BIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) /* Exception types */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) #define EX_GEN			1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) #define EX_GDBELL		2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) #define EX_DBG			3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) #define EX_MC			4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) #define EX_CRIT			5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) #define EX_TLB			6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)  * For input register values, see arch/powerpc/include/asm/kvm_booke_hv_asm.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) .macro kvm_handler intno type scratch, paca_ex, ex_r10, ex_r11, srr0, srr1, flags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)  _GLOBAL(kvmppc_handler_\intno\()_\srr1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	mr	r11, r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	 * Get vcpu from Paca: paca->__current.thread->kvm_vcpu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	PPC_LL	r4, PACACURRENT(r13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	PPC_LL	r4, (THREAD + THREAD_KVM_VCPU)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	PPC_STL	r10, VCPU_CR(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	PPC_STL r11, VCPU_GPR(R4)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	PPC_STL	r5, VCPU_GPR(R5)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	PPC_STL	r6, VCPU_GPR(R6)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	PPC_STL	r8, VCPU_GPR(R8)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	PPC_STL	r9, VCPU_GPR(R9)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	.if \type == EX_TLB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	PPC_LL	r5, EX_TLB_R13(r12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	PPC_LL	r6, EX_TLB_R10(r12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	PPC_LL	r8, EX_TLB_R11(r12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	mfspr	r12, \scratch
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	.else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	mfspr	r5, \scratch
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	PPC_LL	r6, (\paca_ex + \ex_r10)(r13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	PPC_LL	r8, (\paca_ex + \ex_r11)(r13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	.endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	PPC_STL r5, VCPU_GPR(R13)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	PPC_STL r3, VCPU_GPR(R3)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	PPC_STL r7, VCPU_GPR(R7)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	PPC_STL r12, VCPU_GPR(R12)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	PPC_STL r6, VCPU_GPR(R10)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	PPC_STL r8, VCPU_GPR(R11)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	mfctr	r5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	PPC_STL	r5, VCPU_CTR(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	mfspr	r5, \srr0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	mfspr	r6, \srr1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	kvm_handler_common \intno, \srr0, \flags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) #define EX_PARAMS(type) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	EX_##type, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	SPRN_SPRG_##type##_SCRATCH, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	PACA_EX##type, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	EX_R10, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	EX_R11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) #define EX_PARAMS_TLB \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	EX_TLB, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	SPRN_SPRG_GEN_SCRATCH, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	PACA_EXTLB, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	EX_TLB_R10, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	EX_TLB_R11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) kvm_handler BOOKE_INTERRUPT_CRITICAL, EX_PARAMS(CRIT), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	SPRN_CSRR0, SPRN_CSRR1, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) kvm_handler BOOKE_INTERRUPT_MACHINE_CHECK, EX_PARAMS(MC), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	SPRN_MCSRR0, SPRN_MCSRR1, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) kvm_handler BOOKE_INTERRUPT_DATA_STORAGE, EX_PARAMS(GEN), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	SPRN_SRR0, SPRN_SRR1,(NEED_EMU | NEED_DEAR | NEED_ESR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) kvm_handler BOOKE_INTERRUPT_INST_STORAGE, EX_PARAMS(GEN), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	SPRN_SRR0, SPRN_SRR1, NEED_ESR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) kvm_handler BOOKE_INTERRUPT_EXTERNAL, EX_PARAMS(GEN), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	SPRN_SRR0, SPRN_SRR1, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) kvm_handler BOOKE_INTERRUPT_ALIGNMENT, EX_PARAMS(GEN), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	SPRN_SRR0, SPRN_SRR1,(NEED_DEAR | NEED_ESR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) kvm_handler BOOKE_INTERRUPT_PROGRAM, EX_PARAMS(GEN), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	SPRN_SRR0, SPRN_SRR1, (NEED_ESR | NEED_EMU)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) kvm_handler BOOKE_INTERRUPT_FP_UNAVAIL, EX_PARAMS(GEN), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	SPRN_SRR0, SPRN_SRR1, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) kvm_handler BOOKE_INTERRUPT_AP_UNAVAIL, EX_PARAMS(GEN), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	SPRN_SRR0, SPRN_SRR1, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) kvm_handler BOOKE_INTERRUPT_DECREMENTER, EX_PARAMS(GEN), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	SPRN_SRR0, SPRN_SRR1, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) kvm_handler BOOKE_INTERRUPT_FIT, EX_PARAMS(GEN), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	SPRN_SRR0, SPRN_SRR1, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) kvm_handler BOOKE_INTERRUPT_WATCHDOG, EX_PARAMS(CRIT),\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	SPRN_CSRR0, SPRN_CSRR1, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)  * Only bolted TLB miss exception handlers are supported for now
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) kvm_handler BOOKE_INTERRUPT_DTLB_MISS, EX_PARAMS_TLB, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	SPRN_SRR0, SPRN_SRR1, (NEED_EMU | NEED_DEAR | NEED_ESR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) kvm_handler BOOKE_INTERRUPT_ITLB_MISS, EX_PARAMS_TLB, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	SPRN_SRR0, SPRN_SRR1, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) kvm_handler BOOKE_INTERRUPT_ALTIVEC_UNAVAIL, EX_PARAMS(GEN), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	SPRN_SRR0, SPRN_SRR1, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) kvm_handler BOOKE_INTERRUPT_ALTIVEC_ASSIST, EX_PARAMS(GEN), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	SPRN_SRR0, SPRN_SRR1, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) kvm_handler BOOKE_INTERRUPT_PERFORMANCE_MONITOR, EX_PARAMS(GEN), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	SPRN_SRR0, SPRN_SRR1, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) kvm_handler BOOKE_INTERRUPT_DOORBELL, EX_PARAMS(GEN), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	SPRN_SRR0, SPRN_SRR1, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) kvm_handler BOOKE_INTERRUPT_DOORBELL_CRITICAL, EX_PARAMS(CRIT), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	SPRN_CSRR0, SPRN_CSRR1, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) kvm_handler BOOKE_INTERRUPT_HV_PRIV, EX_PARAMS(GEN), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	SPRN_SRR0, SPRN_SRR1, NEED_EMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) kvm_handler BOOKE_INTERRUPT_HV_SYSCALL, EX_PARAMS(GEN), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	SPRN_SRR0, SPRN_SRR1, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) kvm_handler BOOKE_INTERRUPT_GUEST_DBELL, EX_PARAMS(GDBELL), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	SPRN_GSRR0, SPRN_GSRR1, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) kvm_handler BOOKE_INTERRUPT_GUEST_DBELL_CRIT, EX_PARAMS(CRIT), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	SPRN_CSRR0, SPRN_CSRR1, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) kvm_handler BOOKE_INTERRUPT_DEBUG, EX_PARAMS(DBG), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	SPRN_DSRR0, SPRN_DSRR1, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) kvm_handler BOOKE_INTERRUPT_DEBUG, EX_PARAMS(CRIT), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	SPRN_CSRR0, SPRN_CSRR1, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) kvm_handler BOOKE_INTERRUPT_LRAT_ERROR, EX_PARAMS(GEN), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	SPRN_SRR0, SPRN_SRR1, (NEED_EMU | NEED_DEAR | NEED_ESR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)  * For input register values, see arch/powerpc/include/asm/kvm_booke_hv_asm.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) .macro kvm_handler intno srr0, srr1, flags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) _GLOBAL(kvmppc_handler_\intno\()_\srr1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	PPC_LL	r11, THREAD_KVM_VCPU(r10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	PPC_STL r3, VCPU_GPR(R3)(r11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 	mfspr	r3, SPRN_SPRG_RSCRATCH0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	PPC_STL	r4, VCPU_GPR(R4)(r11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 	PPC_LL	r4, THREAD_NORMSAVE(0)(r10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 	PPC_STL	r5, VCPU_GPR(R5)(r11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	PPC_STL	r13, VCPU_CR(r11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	mfspr	r5, \srr0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 	PPC_STL	r3, VCPU_GPR(R10)(r11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 	PPC_LL	r3, THREAD_NORMSAVE(2)(r10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	PPC_STL	r6, VCPU_GPR(R6)(r11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	PPC_STL	r4, VCPU_GPR(R11)(r11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	mfspr	r6, \srr1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	PPC_STL	r7, VCPU_GPR(R7)(r11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	PPC_STL	r8, VCPU_GPR(R8)(r11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 	PPC_STL	r9, VCPU_GPR(R9)(r11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	PPC_STL r3, VCPU_GPR(R13)(r11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	mfctr	r7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 	PPC_STL	r12, VCPU_GPR(R12)(r11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	PPC_STL	r7, VCPU_CTR(r11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	mr	r4, r11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	kvm_handler_common \intno, \srr0, \flags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) .macro kvm_lvl_handler intno scratch srr0, srr1, flags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) _GLOBAL(kvmppc_handler_\intno\()_\srr1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 	mfspr	r10, SPRN_SPRG_THREAD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	PPC_LL	r11, THREAD_KVM_VCPU(r10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	PPC_STL r3, VCPU_GPR(R3)(r11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	mfspr	r3, \scratch
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	PPC_STL	r4, VCPU_GPR(R4)(r11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	PPC_LL	r4, GPR9(r8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 	PPC_STL	r5, VCPU_GPR(R5)(r11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	PPC_STL	r9, VCPU_CR(r11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 	mfspr	r5, \srr0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 	PPC_STL	r3, VCPU_GPR(R8)(r11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 	PPC_LL	r3, GPR10(r8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 	PPC_STL	r6, VCPU_GPR(R6)(r11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	PPC_STL	r4, VCPU_GPR(R9)(r11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 	mfspr	r6, \srr1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 	PPC_LL	r4, GPR11(r8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 	PPC_STL	r7, VCPU_GPR(R7)(r11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 	PPC_STL r3, VCPU_GPR(R10)(r11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	mfctr	r7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 	PPC_STL	r12, VCPU_GPR(R12)(r11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 	PPC_STL r13, VCPU_GPR(R13)(r11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 	PPC_STL	r4, VCPU_GPR(R11)(r11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 	PPC_STL	r7, VCPU_CTR(r11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 	mr	r4, r11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	kvm_handler_common \intno, \srr0, \flags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) kvm_lvl_handler BOOKE_INTERRUPT_CRITICAL, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 	SPRN_SPRG_RSCRATCH_CRIT, SPRN_CSRR0, SPRN_CSRR1, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) kvm_lvl_handler BOOKE_INTERRUPT_MACHINE_CHECK, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 	SPRN_SPRG_RSCRATCH_MC, SPRN_MCSRR0, SPRN_MCSRR1, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) kvm_handler BOOKE_INTERRUPT_DATA_STORAGE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 	SPRN_SRR0, SPRN_SRR1, (NEED_EMU | NEED_DEAR | NEED_ESR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) kvm_handler BOOKE_INTERRUPT_INST_STORAGE, SPRN_SRR0, SPRN_SRR1, NEED_ESR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) kvm_handler BOOKE_INTERRUPT_EXTERNAL, SPRN_SRR0, SPRN_SRR1, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) kvm_handler BOOKE_INTERRUPT_ALIGNMENT, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 	SPRN_SRR0, SPRN_SRR1, (NEED_DEAR | NEED_ESR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) kvm_handler BOOKE_INTERRUPT_PROGRAM, SPRN_SRR0, SPRN_SRR1, (NEED_ESR | NEED_EMU)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) kvm_handler BOOKE_INTERRUPT_FP_UNAVAIL, SPRN_SRR0, SPRN_SRR1, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) kvm_handler BOOKE_INTERRUPT_SYSCALL, SPRN_SRR0, SPRN_SRR1, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) kvm_handler BOOKE_INTERRUPT_AP_UNAVAIL, SPRN_SRR0, SPRN_SRR1, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) kvm_handler BOOKE_INTERRUPT_DECREMENTER, SPRN_SRR0, SPRN_SRR1, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) kvm_handler BOOKE_INTERRUPT_FIT, SPRN_SRR0, SPRN_SRR1, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) kvm_lvl_handler BOOKE_INTERRUPT_WATCHDOG, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 	SPRN_SPRG_RSCRATCH_CRIT, SPRN_CSRR0, SPRN_CSRR1, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) kvm_handler BOOKE_INTERRUPT_DTLB_MISS, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 	SPRN_SRR0, SPRN_SRR1, (NEED_EMU | NEED_DEAR | NEED_ESR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) kvm_handler BOOKE_INTERRUPT_ITLB_MISS, SPRN_SRR0, SPRN_SRR1, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) kvm_handler BOOKE_INTERRUPT_PERFORMANCE_MONITOR, SPRN_SRR0, SPRN_SRR1, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) kvm_handler BOOKE_INTERRUPT_DOORBELL, SPRN_SRR0, SPRN_SRR1, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) kvm_lvl_handler BOOKE_INTERRUPT_DOORBELL_CRITICAL, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 	SPRN_SPRG_RSCRATCH_CRIT, SPRN_CSRR0, SPRN_CSRR1, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) kvm_handler BOOKE_INTERRUPT_HV_PRIV, SPRN_SRR0, SPRN_SRR1, NEED_EMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) kvm_handler BOOKE_INTERRUPT_HV_SYSCALL, SPRN_SRR0, SPRN_SRR1, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) kvm_handler BOOKE_INTERRUPT_GUEST_DBELL, SPRN_GSRR0, SPRN_GSRR1, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) kvm_lvl_handler BOOKE_INTERRUPT_GUEST_DBELL_CRIT, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 	SPRN_SPRG_RSCRATCH_CRIT, SPRN_CSRR0, SPRN_CSRR1, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) kvm_lvl_handler BOOKE_INTERRUPT_DEBUG, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 	SPRN_SPRG_RSCRATCH_CRIT, SPRN_CSRR0, SPRN_CSRR1, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) kvm_lvl_handler BOOKE_INTERRUPT_DEBUG, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 	SPRN_SPRG_RSCRATCH_DBG, SPRN_DSRR0, SPRN_DSRR1, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) /* Registers:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371)  *  SPRG_SCRATCH0: guest r10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372)  *  r4: vcpu pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373)  *  r11: vcpu->arch.shared
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374)  *  r14: KVM exit number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) _GLOBAL(kvmppc_resume_host)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 	/* Save remaining volatile guest register state to vcpu. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 	mfspr	r3, SPRN_VRSAVE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 	PPC_STL	r0, VCPU_GPR(R0)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 	mflr	r5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 	mfspr	r6, SPRN_SPRG4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 	PPC_STL	r5, VCPU_LR(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 	mfspr	r7, SPRN_SPRG5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 	stw	r3, VCPU_VRSAVE(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) #ifdef CONFIG_64BIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 	PPC_LL	r3, PACA_SPRG_VDSO(r13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 	mfspr	r5, SPRN_SPRG9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 	PPC_STD(r6, VCPU_SHARED_SPRG4, r11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 	mfspr	r8, SPRN_SPRG6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 	PPC_STD(r7, VCPU_SHARED_SPRG5, r11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 	mfspr	r9, SPRN_SPRG7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) #ifdef CONFIG_64BIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 	mtspr	SPRN_SPRG_VDSO_WRITE, r3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 	PPC_STD(r5, VCPU_SPRG9, r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 	PPC_STD(r8, VCPU_SHARED_SPRG6, r11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 	mfxer	r3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 	PPC_STD(r9, VCPU_SHARED_SPRG7, r11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 	/* save guest MAS registers and restore host mas4 & mas6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 	mfspr	r5, SPRN_MAS0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 	PPC_STL	r3, VCPU_XER(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 	mfspr	r6, SPRN_MAS1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 	stw	r5, VCPU_SHARED_MAS0(r11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 	mfspr	r7, SPRN_MAS2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 	stw	r6, VCPU_SHARED_MAS1(r11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 	PPC_STD(r7, VCPU_SHARED_MAS2, r11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 	mfspr	r5, SPRN_MAS3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 	mfspr	r6, SPRN_MAS4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 	stw	r5, VCPU_SHARED_MAS7_3+4(r11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 	mfspr	r7, SPRN_MAS6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 	stw	r6, VCPU_SHARED_MAS4(r11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 	mfspr	r5, SPRN_MAS7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) 	lwz	r6, VCPU_HOST_MAS4(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) 	stw	r7, VCPU_SHARED_MAS6(r11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) 	lwz	r8, VCPU_HOST_MAS6(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) 	mtspr	SPRN_MAS4, r6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) 	stw	r5, VCPU_SHARED_MAS7_3+0(r11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) 	mtspr	SPRN_MAS6, r8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) 	/* Enable MAS register updates via exception */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) 	mfspr	r3, SPRN_EPCR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) 	rlwinm	r3, r3, 0, ~SPRN_EPCR_DMIUH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) 	mtspr	SPRN_EPCR, r3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) 	isync
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) #ifdef CONFIG_64BIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) 	 * We enter with interrupts disabled in hardware, but
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) 	 * we need to call RECONCILE_IRQ_STATE to ensure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) 	 * that the software state is kept in sync.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) 	RECONCILE_IRQ_STATE(r3,r5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) 	/* Switch to kernel stack and jump to handler. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) 	mr	r3, r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) 	mr	r5, r14 /* intno */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) 	mr	r14, r4 /* Save vcpu pointer. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) 	mr	r4, r5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) 	bl	kvmppc_handle_exit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) 	/* Restore vcpu pointer and the nonvolatiles we used. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) 	mr	r4, r14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) 	PPC_LL	r14, VCPU_GPR(R14)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) 	andi.	r5, r3, RESUME_FLAG_NV
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) 	beq	skip_nv_load
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) 	PPC_LL	r15, VCPU_GPR(R15)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) 	PPC_LL	r16, VCPU_GPR(R16)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) 	PPC_LL	r17, VCPU_GPR(R17)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) 	PPC_LL	r18, VCPU_GPR(R18)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) 	PPC_LL	r19, VCPU_GPR(R19)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) 	PPC_LL	r20, VCPU_GPR(R20)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) 	PPC_LL	r21, VCPU_GPR(R21)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) 	PPC_LL	r22, VCPU_GPR(R22)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) 	PPC_LL	r23, VCPU_GPR(R23)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) 	PPC_LL	r24, VCPU_GPR(R24)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) 	PPC_LL	r25, VCPU_GPR(R25)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) 	PPC_LL	r26, VCPU_GPR(R26)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) 	PPC_LL	r27, VCPU_GPR(R27)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) 	PPC_LL	r28, VCPU_GPR(R28)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) 	PPC_LL	r29, VCPU_GPR(R29)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) 	PPC_LL	r30, VCPU_GPR(R30)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) 	PPC_LL	r31, VCPU_GPR(R31)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) skip_nv_load:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) 	/* Should we return to the guest? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) 	andi.	r5, r3, RESUME_FLAG_HOST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) 	beq	lightweight_exit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) 	srawi	r3, r3, 2 /* Shift -ERR back down. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) heavyweight_exit:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) 	/* Not returning to guest. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) 	PPC_LL	r5, HOST_STACK_LR(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) 	lwz	r6, HOST_CR(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) 	 * We already saved guest volatile register state; now save the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) 	 * non-volatiles.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) 	PPC_STL	r15, VCPU_GPR(R15)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) 	PPC_STL	r16, VCPU_GPR(R16)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) 	PPC_STL	r17, VCPU_GPR(R17)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) 	PPC_STL	r18, VCPU_GPR(R18)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) 	PPC_STL	r19, VCPU_GPR(R19)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) 	PPC_STL	r20, VCPU_GPR(R20)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) 	PPC_STL	r21, VCPU_GPR(R21)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) 	PPC_STL	r22, VCPU_GPR(R22)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) 	PPC_STL	r23, VCPU_GPR(R23)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) 	PPC_STL	r24, VCPU_GPR(R24)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) 	PPC_STL	r25, VCPU_GPR(R25)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) 	PPC_STL	r26, VCPU_GPR(R26)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) 	PPC_STL	r27, VCPU_GPR(R27)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) 	PPC_STL	r28, VCPU_GPR(R28)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) 	PPC_STL	r29, VCPU_GPR(R29)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) 	PPC_STL	r30, VCPU_GPR(R30)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) 	PPC_STL	r31, VCPU_GPR(R31)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) 	/* Load host non-volatile register state from host stack. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) 	PPC_LL	r14, HOST_NV_GPR(R14)(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) 	PPC_LL	r15, HOST_NV_GPR(R15)(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) 	PPC_LL	r16, HOST_NV_GPR(R16)(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) 	PPC_LL	r17, HOST_NV_GPR(R17)(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) 	PPC_LL	r18, HOST_NV_GPR(R18)(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) 	PPC_LL	r19, HOST_NV_GPR(R19)(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) 	PPC_LL	r20, HOST_NV_GPR(R20)(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) 	PPC_LL	r21, HOST_NV_GPR(R21)(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) 	PPC_LL	r22, HOST_NV_GPR(R22)(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) 	PPC_LL	r23, HOST_NV_GPR(R23)(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) 	PPC_LL	r24, HOST_NV_GPR(R24)(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) 	PPC_LL	r25, HOST_NV_GPR(R25)(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) 	PPC_LL	r26, HOST_NV_GPR(R26)(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) 	PPC_LL	r27, HOST_NV_GPR(R27)(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) 	PPC_LL	r28, HOST_NV_GPR(R28)(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) 	PPC_LL	r29, HOST_NV_GPR(R29)(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) 	PPC_LL	r30, HOST_NV_GPR(R30)(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) 	PPC_LL	r31, HOST_NV_GPR(R31)(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) 	/* Return to kvm_vcpu_run(). */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) 	mtlr	r5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) 	mtcr	r6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) 	addi	r1, r1, HOST_STACK_SIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) 	/* r3 still contains the return code from kvmppc_handle_exit(). */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) 	blr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) /* Registers:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529)  *  r3: vcpu pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) _GLOBAL(__kvmppc_vcpu_run)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) 	stwu	r1, -HOST_STACK_SIZE(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) 	PPC_STL	r1, VCPU_HOST_STACK(r3)	/* Save stack pointer to vcpu. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) 	/* Save host state to stack. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) 	mr	r4, r3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) 	mflr	r3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) 	mfcr	r5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) 	PPC_STL	r3, HOST_STACK_LR(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) 	stw	r5, HOST_CR(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) 	/* Save host non-volatile register state to stack. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) 	PPC_STL	r14, HOST_NV_GPR(R14)(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) 	PPC_STL	r15, HOST_NV_GPR(R15)(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) 	PPC_STL	r16, HOST_NV_GPR(R16)(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) 	PPC_STL	r17, HOST_NV_GPR(R17)(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) 	PPC_STL	r18, HOST_NV_GPR(R18)(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) 	PPC_STL	r19, HOST_NV_GPR(R19)(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) 	PPC_STL	r20, HOST_NV_GPR(R20)(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) 	PPC_STL	r21, HOST_NV_GPR(R21)(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) 	PPC_STL	r22, HOST_NV_GPR(R22)(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) 	PPC_STL	r23, HOST_NV_GPR(R23)(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) 	PPC_STL	r24, HOST_NV_GPR(R24)(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) 	PPC_STL	r25, HOST_NV_GPR(R25)(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) 	PPC_STL	r26, HOST_NV_GPR(R26)(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) 	PPC_STL	r27, HOST_NV_GPR(R27)(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) 	PPC_STL	r28, HOST_NV_GPR(R28)(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) 	PPC_STL	r29, HOST_NV_GPR(R29)(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) 	PPC_STL	r30, HOST_NV_GPR(R30)(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) 	PPC_STL	r31, HOST_NV_GPR(R31)(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) 	/* Load guest non-volatiles. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) 	PPC_LL	r14, VCPU_GPR(R14)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) 	PPC_LL	r15, VCPU_GPR(R15)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) 	PPC_LL	r16, VCPU_GPR(R16)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) 	PPC_LL	r17, VCPU_GPR(R17)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) 	PPC_LL	r18, VCPU_GPR(R18)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) 	PPC_LL	r19, VCPU_GPR(R19)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) 	PPC_LL	r20, VCPU_GPR(R20)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) 	PPC_LL	r21, VCPU_GPR(R21)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) 	PPC_LL	r22, VCPU_GPR(R22)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) 	PPC_LL	r23, VCPU_GPR(R23)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) 	PPC_LL	r24, VCPU_GPR(R24)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) 	PPC_LL	r25, VCPU_GPR(R25)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) 	PPC_LL	r26, VCPU_GPR(R26)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) 	PPC_LL	r27, VCPU_GPR(R27)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) 	PPC_LL	r28, VCPU_GPR(R28)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) 	PPC_LL	r29, VCPU_GPR(R29)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) 	PPC_LL	r30, VCPU_GPR(R30)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) 	PPC_LL	r31, VCPU_GPR(R31)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) lightweight_exit:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) 	PPC_STL	r2, HOST_R2(r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) 	mfspr	r3, SPRN_PID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) 	stw	r3, VCPU_HOST_PID(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) 	lwz	r3, VCPU_GUEST_PID(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) 	mtspr	SPRN_PID, r3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) 	PPC_LL	r11, VCPU_SHARED(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) 	/* Disable MAS register updates via exception */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) 	mfspr	r3, SPRN_EPCR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) 	oris	r3, r3, SPRN_EPCR_DMIUH@h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) 	mtspr	SPRN_EPCR, r3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) 	isync
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) 	/* Save host mas4 and mas6 and load guest MAS registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) 	mfspr	r3, SPRN_MAS4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) 	stw	r3, VCPU_HOST_MAS4(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) 	mfspr	r3, SPRN_MAS6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) 	stw	r3, VCPU_HOST_MAS6(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) 	lwz	r3, VCPU_SHARED_MAS0(r11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) 	lwz	r5, VCPU_SHARED_MAS1(r11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) 	PPC_LD(r6, VCPU_SHARED_MAS2, r11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) 	lwz	r7, VCPU_SHARED_MAS7_3+4(r11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) 	lwz	r8, VCPU_SHARED_MAS4(r11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) 	mtspr	SPRN_MAS0, r3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) 	mtspr	SPRN_MAS1, r5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) 	mtspr	SPRN_MAS2, r6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) 	mtspr	SPRN_MAS3, r7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) 	mtspr	SPRN_MAS4, r8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) 	lwz	r3, VCPU_SHARED_MAS6(r11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) 	lwz	r5, VCPU_SHARED_MAS7_3+0(r11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) 	mtspr	SPRN_MAS6, r3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) 	mtspr	SPRN_MAS7, r5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) 	 * Host interrupt handlers may have clobbered these guest-readable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) 	 * SPRGs, so we need to reload them here with the guest's values.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) 	lwz	r3, VCPU_VRSAVE(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) 	PPC_LD(r5, VCPU_SHARED_SPRG4, r11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) 	mtspr	SPRN_VRSAVE, r3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) 	PPC_LD(r6, VCPU_SHARED_SPRG5, r11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) 	mtspr	SPRN_SPRG4W, r5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) 	PPC_LD(r7, VCPU_SHARED_SPRG6, r11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) 	mtspr	SPRN_SPRG5W, r6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) 	PPC_LD(r8, VCPU_SHARED_SPRG7, r11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) 	mtspr	SPRN_SPRG6W, r7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) 	PPC_LD(r5, VCPU_SPRG9, r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) 	mtspr	SPRN_SPRG7W, r8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) 	mtspr	SPRN_SPRG9, r5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) 	/* Load some guest volatiles. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) 	PPC_LL	r3, VCPU_LR(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) 	PPC_LL	r5, VCPU_XER(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) 	PPC_LL	r6, VCPU_CTR(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) 	PPC_LL	r7, VCPU_CR(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) 	PPC_LL	r8, VCPU_PC(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) 	PPC_LD(r9, VCPU_SHARED_MSR, r11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) 	PPC_LL	r0, VCPU_GPR(R0)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) 	PPC_LL	r1, VCPU_GPR(R1)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) 	PPC_LL	r2, VCPU_GPR(R2)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) 	PPC_LL	r10, VCPU_GPR(R10)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) 	PPC_LL	r11, VCPU_GPR(R11)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) 	PPC_LL	r12, VCPU_GPR(R12)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) 	PPC_LL	r13, VCPU_GPR(R13)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) 	mtlr	r3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) 	mtxer	r5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) 	mtctr	r6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) 	mtsrr0	r8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) 	mtsrr1	r9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) #ifdef CONFIG_KVM_EXIT_TIMING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) 	/* save enter time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) 	mfspr	r6, SPRN_TBRU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) 	mfspr	r9, SPRN_TBRL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) 	mfspr	r8, SPRN_TBRU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) 	cmpw	r8, r6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) 	stw	r9, VCPU_TIMING_LAST_ENTER_TBL(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) 	bne	1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) 	stw	r8, VCPU_TIMING_LAST_ENTER_TBU(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) 	 * Don't execute any instruction which can change CR after
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) 	 * below instruction.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) 	mtcr	r7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) 	/* Finish loading guest volatiles and jump to guest. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) 	PPC_LL	r5, VCPU_GPR(R5)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) 	PPC_LL	r6, VCPU_GPR(R6)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) 	PPC_LL	r7, VCPU_GPR(R7)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) 	PPC_LL	r8, VCPU_GPR(R8)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) 	PPC_LL	r9, VCPU_GPR(R9)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) 	PPC_LL	r3, VCPU_GPR(R3)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) 	PPC_LL	r4, VCPU_GPR(R4)(r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) 	rfi