Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Copyright 2012 Michael Ellerman, IBM Corporation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Copyright 2012 Benjamin Herrenschmidt, IBM Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) #ifndef _KVM_PPC_BOOK3S_XICS_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #define _KVM_PPC_BOOK3S_XICS_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #ifdef CONFIG_KVM_XICS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  * We use a two-level tree to store interrupt source information.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)  * There are up to 1024 ICS nodes, each of which can represent
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14)  * 1024 sources.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #define KVMPPC_XICS_MAX_ICS_ID	1023
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #define KVMPPC_XICS_ICS_SHIFT	10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #define KVMPPC_XICS_IRQ_PER_ICS	(1 << KVMPPC_XICS_ICS_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #define KVMPPC_XICS_SRC_MASK	(KVMPPC_XICS_IRQ_PER_ICS - 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22)  * Interrupt source numbers below this are reserved, for example
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23)  * 0 is "no interrupt", and 2 is used for IPIs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define KVMPPC_XICS_FIRST_IRQ	16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define KVMPPC_XICS_NR_IRQS	((KVMPPC_XICS_MAX_ICS_ID + 1) * \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 				 KVMPPC_XICS_IRQ_PER_ICS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) /* Priority value to use for disabling an interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define MASKED	0xff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define PQ_PRESENTED	1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define PQ_QUEUED	2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) /* State for one irq source */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) struct ics_irq_state {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	u32 number;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	u32 server;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	u32 pq_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	u8  priority;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	u8  saved_priority;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	u8  resend;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	u8  masked_pending;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	u8  lsi;		/* level-sensitive interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	u8  exists;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	int intr_cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	u32 host_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) /* Atomic ICP state, updated with a single compare & swap */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) union kvmppc_icp_state {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	unsigned long raw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 		u8 out_ee:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 		u8 need_resend:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 		u8 cppr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 		u8 mfrr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 		u8 pending_pri;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 		u32 xisr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) /* One bit per ICS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) #define ICP_RESEND_MAP_SIZE	(KVMPPC_XICS_MAX_ICS_ID / BITS_PER_LONG + 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) struct kvmppc_icp {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	struct kvm_vcpu *vcpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	unsigned long server_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	union kvmppc_icp_state state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	unsigned long resend_map[ICP_RESEND_MAP_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	/* Real mode might find something too hard, here's the action
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	 * it might request from virtual mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) #define XICS_RM_KICK_VCPU	0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) #define XICS_RM_CHECK_RESEND	0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) #define XICS_RM_NOTIFY_EOI	0x8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	u32 rm_action;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	struct kvm_vcpu *rm_kick_target;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	struct kvmppc_icp *rm_resend_icp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	u32  rm_reject;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	u32  rm_eoied_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	/* Counters for each reason we exited real mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	unsigned long n_rm_kick_vcpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	unsigned long n_rm_check_resend;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	unsigned long n_rm_notify_eoi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	/* Counters for handling ICP processing in real mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	unsigned long n_check_resend;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	unsigned long n_reject;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	/* Debug stuff for real mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	union kvmppc_icp_state rm_dbgstate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	struct kvm_vcpu *rm_dbgtgt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) struct kvmppc_ics {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	arch_spinlock_t lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	u16 icsid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	struct ics_irq_state irq_state[KVMPPC_XICS_IRQ_PER_ICS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) struct kvmppc_xics {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	struct kvm *kvm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	struct kvm_device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	struct dentry *dentry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	u32 max_icsid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	bool real_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	bool real_mode_dbg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	u32 err_noics;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	u32 err_noicp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	struct kvmppc_ics *ics[KVMPPC_XICS_MAX_ICS_ID + 1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) static inline struct kvmppc_icp *kvmppc_xics_find_server(struct kvm *kvm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 							 u32 nr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	struct kvm_vcpu *vcpu = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	kvm_for_each_vcpu(i, vcpu, kvm) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 		if (vcpu->arch.icp && nr == vcpu->arch.icp->server_num)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 			return vcpu->arch.icp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) static inline struct kvmppc_ics *kvmppc_xics_find_ics(struct kvmppc_xics *xics,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 						      u32 irq, u16 *source)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	u32 icsid = irq >> KVMPPC_XICS_ICS_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	u16 src = irq & KVMPPC_XICS_SRC_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	struct kvmppc_ics *ics;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	if (source)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 		*source = src;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	if (icsid > KVMPPC_XICS_MAX_ICS_ID)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 		return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	ics = xics->ics[icsid];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	if (!ics)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 		return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	return ics;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) extern unsigned long xics_rm_h_xirr(struct kvm_vcpu *vcpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) extern int xics_rm_h_ipi(struct kvm_vcpu *vcpu, unsigned long server,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 			 unsigned long mfrr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) extern int xics_rm_h_cppr(struct kvm_vcpu *vcpu, unsigned long cppr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) extern int xics_rm_h_eoi(struct kvm_vcpu *vcpu, unsigned long xirr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) #endif /* CONFIG_KVM_XICS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) #endif /* _KVM_PPC_BOOK3S_XICS_H */