^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Routines to emulate some Altivec/VMX instructions, specifically
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * those that can trap when given denormalized operands in Java mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/sched.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <asm/ptrace.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <asm/processor.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <asm/switch_to.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/uaccess.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <asm/inst.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) /* Functions in vector.S */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) extern void vaddfp(vector128 *dst, vector128 *a, vector128 *b);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) extern void vsubfp(vector128 *dst, vector128 *a, vector128 *b);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) extern void vmaddfp(vector128 *dst, vector128 *a, vector128 *b, vector128 *c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) extern void vnmsubfp(vector128 *dst, vector128 *a, vector128 *b, vector128 *c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) extern void vrefp(vector128 *dst, vector128 *src);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) extern void vrsqrtefp(vector128 *dst, vector128 *src);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) extern void vexptep(vector128 *dst, vector128 *src);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) static unsigned int exp2s[8] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 0x800000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 0x8b95c2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 0x9837f0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 0xa5fed7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 0xb504f3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 0xc5672a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 0xd744fd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 0xeac0c7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * Computes an estimate of 2^x. The `s' argument is the 32-bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * single-precision floating-point representation of x.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) static unsigned int eexp2(unsigned int s)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) int exp, pwr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) unsigned int mant, frac;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) /* extract exponent field from input */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) exp = ((s >> 23) & 0xff) - 127;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) if (exp > 7) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) /* check for NaN input */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) if (exp == 128 && (s & 0x7fffff) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) return s | 0x400000; /* return QNaN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) /* 2^-big = 0, 2^+big = +Inf */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) return (s & 0x80000000)? 0: 0x7f800000; /* 0 or +Inf */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) if (exp < -23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) return 0x3f800000; /* 1.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) /* convert to fixed point integer in 9.23 representation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) pwr = (s & 0x7fffff) | 0x800000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) if (exp > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) pwr <<= exp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) pwr >>= -exp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) if (s & 0x80000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) pwr = -pwr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) /* extract integer part, which becomes exponent part of result */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) exp = (pwr >> 23) + 126;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) if (exp >= 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) return 0x7f800000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) if (exp < -23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) /* table lookup on top 3 bits of fraction to get mantissa */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) mant = exp2s[(pwr >> 20) & 7];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) /* linear interpolation using remaining 20 bits of fraction */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) asm("mulhwu %0,%1,%2" : "=r" (frac)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) : "r" (pwr << 12), "r" (0x172b83ff));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) asm("mulhwu %0,%1,%2" : "=r" (frac) : "r" (frac), "r" (mant));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) mant += frac;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) if (exp >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) return mant + (exp << 23);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) /* denormalized result */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) exp = -exp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) mant += 1 << (exp - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) return mant >> exp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) * Computes an estimate of log_2(x). The `s' argument is the 32-bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) * single-precision floating-point representation of x.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) static unsigned int elog2(unsigned int s)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) int exp, mant, lz, frac;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) exp = s & 0x7f800000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) mant = s & 0x7fffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) if (exp == 0x7f800000) { /* Inf or NaN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) if (mant != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) s |= 0x400000; /* turn NaN into QNaN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) return s;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) if ((exp | mant) == 0) /* +0 or -0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) return 0xff800000; /* return -Inf */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) if (exp == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) /* denormalized */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) asm("cntlzw %0,%1" : "=r" (lz) : "r" (mant));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) mant <<= lz - 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) exp = (-118 - lz) << 23;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) mant |= 0x800000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) exp -= 127 << 23;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) if (mant >= 0xb504f3) { /* 2^0.5 * 2^23 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) exp |= 0x400000; /* 0.5 * 2^23 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) asm("mulhwu %0,%1,%2" : "=r" (mant)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) : "r" (mant), "r" (0xb504f334)); /* 2^-0.5 * 2^32 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) if (mant >= 0x9837f0) { /* 2^0.25 * 2^23 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) exp |= 0x200000; /* 0.25 * 2^23 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) asm("mulhwu %0,%1,%2" : "=r" (mant)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) : "r" (mant), "r" (0xd744fccb)); /* 2^-0.25 * 2^32 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) if (mant >= 0x8b95c2) { /* 2^0.125 * 2^23 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) exp |= 0x100000; /* 0.125 * 2^23 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) asm("mulhwu %0,%1,%2" : "=r" (mant)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) : "r" (mant), "r" (0xeac0c6e8)); /* 2^-0.125 * 2^32 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) if (mant > 0x800000) { /* 1.0 * 2^23 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) /* calculate (mant - 1) * 1.381097463 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) /* 1.381097463 == 0.125 / (2^0.125 - 1) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) asm("mulhwu %0,%1,%2" : "=r" (frac)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) : "r" ((mant - 0x800000) << 1), "r" (0xb0c7cd3a));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) exp += frac;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) s = exp & 0x80000000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) if (exp != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) if (s)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) exp = -exp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) asm("cntlzw %0,%1" : "=r" (lz) : "r" (exp));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) lz = 8 - lz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) if (lz > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) exp >>= lz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) else if (lz < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) exp <<= -lz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) s += ((lz + 126) << 23) + exp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) return s;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) #define VSCR_SAT 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) static int ctsxs(unsigned int x, int scale, unsigned int *vscrp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) int exp, mant;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) exp = (x >> 23) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) mant = x & 0x7fffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) if (exp == 255 && mant != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) return 0; /* NaN -> 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) exp = exp - 127 + scale;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) if (exp < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) return 0; /* round towards zero */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) if (exp >= 31) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) /* saturate, unless the result would be -2^31 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) if (x + (scale << 23) != 0xcf000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) *vscrp |= VSCR_SAT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) return (x & 0x80000000)? 0x80000000: 0x7fffffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) mant |= 0x800000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) mant = (mant << 7) >> (30 - exp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) return (x & 0x80000000)? -mant: mant;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) static unsigned int ctuxs(unsigned int x, int scale, unsigned int *vscrp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) int exp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) unsigned int mant;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) exp = (x >> 23) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) mant = x & 0x7fffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) if (exp == 255 && mant != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) return 0; /* NaN -> 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) exp = exp - 127 + scale;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) if (exp < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) return 0; /* round towards zero */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) if (x & 0x80000000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) /* negative => saturate to 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) *vscrp |= VSCR_SAT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) if (exp >= 32) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) /* saturate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) *vscrp |= VSCR_SAT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) return 0xffffffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) mant |= 0x800000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) mant = (mant << 8) >> (31 - exp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) return mant;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) /* Round to floating integer, towards 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) static unsigned int rfiz(unsigned int x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) int exp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) exp = ((x >> 23) & 0xff) - 127;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) if (exp == 128 && (x & 0x7fffff) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) return x | 0x400000; /* NaN -> make it a QNaN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) if (exp >= 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) return x; /* it's an integer already (or Inf) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) if (exp < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) return x & 0x80000000; /* |x| < 1.0 rounds to 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) return x & ~(0x7fffff >> exp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) /* Round to floating integer, towards +/- Inf */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) static unsigned int rfii(unsigned int x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) int exp, mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) exp = ((x >> 23) & 0xff) - 127;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) if (exp == 128 && (x & 0x7fffff) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) return x | 0x400000; /* NaN -> make it a QNaN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) if (exp >= 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) return x; /* it's an integer already (or Inf) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) if ((x & 0x7fffffff) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) return x; /* +/-0 -> +/-0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) if (exp < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) /* 0 < |x| < 1.0 rounds to +/- 1.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) return (x & 0x80000000) | 0x3f800000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) mask = 0x7fffff >> exp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) /* mantissa overflows into exponent - that's OK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) it can't overflow into the sign bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) return (x + mask) & ~mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) /* Round to floating integer, to nearest */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) static unsigned int rfin(unsigned int x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) int exp, half;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) exp = ((x >> 23) & 0xff) - 127;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) if (exp == 128 && (x & 0x7fffff) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) return x | 0x400000; /* NaN -> make it a QNaN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) if (exp >= 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) return x; /* it's an integer already (or Inf) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) if (exp < -1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) return x & 0x80000000; /* |x| < 0.5 -> +/-0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) if (exp == -1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) /* 0.5 <= |x| < 1.0 rounds to +/- 1.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) return (x & 0x80000000) | 0x3f800000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) half = 0x400000 >> exp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) /* add 0.5 to the magnitude and chop off the fraction bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) return (x + half) & ~(0x7fffff >> exp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) int emulate_altivec(struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) struct ppc_inst instr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) unsigned int i, word;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) unsigned int va, vb, vc, vd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) vector128 *vrs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) if (get_user_instr(instr, (void __user *)regs->nip))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) word = ppc_inst_val(instr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) if (ppc_inst_primary_opcode(instr) != 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) return -EINVAL; /* not an altivec instruction */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) vd = (word >> 21) & 0x1f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) va = (word >> 16) & 0x1f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) vb = (word >> 11) & 0x1f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) vc = (word >> 6) & 0x1f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) vrs = current->thread.vr_state.vr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) switch (word & 0x3f) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) case 10:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) switch (vc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) case 0: /* vaddfp */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) vaddfp(&vrs[vd], &vrs[va], &vrs[vb]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) case 1: /* vsubfp */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) vsubfp(&vrs[vd], &vrs[va], &vrs[vb]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) case 4: /* vrefp */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) vrefp(&vrs[vd], &vrs[vb]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) case 5: /* vrsqrtefp */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) vrsqrtefp(&vrs[vd], &vrs[vb]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) case 6: /* vexptefp */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) for (i = 0; i < 4; ++i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) vrs[vd].u[i] = eexp2(vrs[vb].u[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) case 7: /* vlogefp */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) for (i = 0; i < 4; ++i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) vrs[vd].u[i] = elog2(vrs[vb].u[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) case 8: /* vrfin */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) for (i = 0; i < 4; ++i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) vrs[vd].u[i] = rfin(vrs[vb].u[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) case 9: /* vrfiz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) for (i = 0; i < 4; ++i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) vrs[vd].u[i] = rfiz(vrs[vb].u[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) case 10: /* vrfip */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) for (i = 0; i < 4; ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) u32 x = vrs[vb].u[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) x = (x & 0x80000000)? rfiz(x): rfii(x);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) vrs[vd].u[i] = x;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) case 11: /* vrfim */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) for (i = 0; i < 4; ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) u32 x = vrs[vb].u[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) x = (x & 0x80000000)? rfii(x): rfiz(x);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) vrs[vd].u[i] = x;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) case 14: /* vctuxs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) for (i = 0; i < 4; ++i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) vrs[vd].u[i] = ctuxs(vrs[vb].u[i], va,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) ¤t->thread.vr_state.vscr.u[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) case 15: /* vctsxs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) for (i = 0; i < 4; ++i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) vrs[vd].u[i] = ctsxs(vrs[vb].u[i], va,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) ¤t->thread.vr_state.vscr.u[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) case 46: /* vmaddfp */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) vmaddfp(&vrs[vd], &vrs[va], &vrs[vb], &vrs[vc]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) case 47: /* vnmsubfp */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) vnmsubfp(&vrs[vd], &vrs[va], &vrs[vb], &vrs[vc]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) }