^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * PowerPC version
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Derived from "arch/i386/kernel/signal.c"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (C) 1991, 1992 Linus Torvalds
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * 1997-11-28 Modified for POSIX.1b signals by Richard Henderson
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/sched.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/mm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/smp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/signal.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/wait.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/unistd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/stddef.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/elf.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/ptrace.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/ratelimit.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/syscalls.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/pagemap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <asm/sigcontext.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <asm/ucontext.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/uaccess.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <asm/unistd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <asm/cacheflush.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <asm/syscalls.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <asm/vdso.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <asm/switch_to.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <asm/tm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <asm/asm-prototypes.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include "signal.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define GP_REGS_SIZE min(sizeof(elf_gregset_t), sizeof(struct pt_regs))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define FP_REGS_SIZE sizeof(elf_fpregset_t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define TRAMP_TRACEBACK 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define TRAMP_SIZE 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) * When we have signals to deliver, we set up on the user stack,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) * going down from the original stack pointer:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) * 1) a rt_sigframe struct which contains the ucontext
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) * 2) a gap of __SIGNAL_FRAMESIZE bytes which acts as a dummy caller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) * frame for the signal handler.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) struct rt_sigframe {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) /* sys_rt_sigreturn requires the ucontext be the first field */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) struct ucontext uc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) struct ucontext uc_transact;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) unsigned long _unused[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) unsigned int tramp[TRAMP_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) struct siginfo __user *pinfo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) void __user *puc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) struct siginfo info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) /* New 64 bit little-endian ABI allows redzone of 512 bytes below sp */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) char abigap[USER_REDZONE_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) } __attribute__ ((aligned (16)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) static const char fmt32[] = KERN_INFO \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) "%s[%d]: bad frame in %s: %08lx nip %08lx lr %08lx\n";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) static const char fmt64[] = KERN_INFO \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) "%s[%d]: bad frame in %s: %016lx nip %016lx lr %016lx\n";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) * This computes a quad word aligned pointer inside the vmx_reserve array
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) * element. For historical reasons sigcontext might not be quad word aligned,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) * but the location we write the VMX regs to must be. See the comment in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) * sigcontext for more detail.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #ifdef CONFIG_ALTIVEC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) static elf_vrreg_t __user *sigcontext_vmx_regs(struct sigcontext __user *sc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) return (elf_vrreg_t __user *) (((unsigned long)sc->vmx_reserve + 15) & ~0xful);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) * Set up the sigcontext for the signal frame.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) static long setup_sigcontext(struct sigcontext __user *sc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) struct task_struct *tsk, int signr, sigset_t *set,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) unsigned long handler, int ctx_has_vsx_region)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) /* When CONFIG_ALTIVEC is set, we _always_ setup v_regs even if the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) * process never used altivec yet (MSR_VEC is zero in pt_regs of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) * the context). This is very important because we must ensure we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) * don't lose the VRSAVE content that may have been set prior to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) * the process doing its first vector operation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) * Userland shall check AT_HWCAP to know whether it can rely on the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) * v_regs pointer or not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #ifdef CONFIG_ALTIVEC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) elf_vrreg_t __user *v_regs = sigcontext_vmx_regs(sc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) unsigned long vrsave;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) struct pt_regs *regs = tsk->thread.regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) unsigned long msr = regs->msr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) long err = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) /* Force usr to alway see softe as 1 (interrupts enabled) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) unsigned long softe = 0x1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) BUG_ON(tsk != current);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #ifdef CONFIG_ALTIVEC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) err |= __put_user(v_regs, &sc->v_regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) /* save altivec registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) if (tsk->thread.used_vr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) flush_altivec_to_thread(tsk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) /* Copy 33 vec registers (vr0..31 and vscr) to the stack */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) err |= __copy_to_user(v_regs, &tsk->thread.vr_state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 33 * sizeof(vector128));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) /* set MSR_VEC in the MSR value in the frame to indicate that sc->v_reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) * contains valid data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) msr |= MSR_VEC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) /* We always copy to/from vrsave, it's 0 if we don't have or don't
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) * use altivec.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) vrsave = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) if (cpu_has_feature(CPU_FTR_ALTIVEC)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) vrsave = mfspr(SPRN_VRSAVE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) tsk->thread.vrsave = vrsave;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) err |= __put_user(vrsave, (u32 __user *)&v_regs[33]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) #else /* CONFIG_ALTIVEC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) err |= __put_user(0, &sc->v_regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) #endif /* CONFIG_ALTIVEC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) flush_fp_to_thread(tsk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) /* copy fpr regs and fpscr */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) err |= copy_fpr_to_user(&sc->fp_regs, tsk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) * Clear the MSR VSX bit to indicate there is no valid state attached
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) * to this context, except in the specific case below where we set it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) msr &= ~MSR_VSX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) #ifdef CONFIG_VSX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) * Copy VSX low doubleword to local buffer for formatting,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) * then out to userspace. Update v_regs to point after the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) * VMX data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) if (tsk->thread.used_vsr && ctx_has_vsx_region) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) flush_vsx_to_thread(tsk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) v_regs += ELF_NVRREG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) err |= copy_vsx_to_user(v_regs, tsk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) /* set MSR_VSX in the MSR value in the frame to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) * indicate that sc->vs_reg) contains valid data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) msr |= MSR_VSX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) #endif /* CONFIG_VSX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) err |= __put_user(&sc->gp_regs, &sc->regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) WARN_ON(!FULL_REGS(regs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) err |= __copy_to_user(&sc->gp_regs, regs, GP_REGS_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) err |= __put_user(msr, &sc->gp_regs[PT_MSR]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) err |= __put_user(softe, &sc->gp_regs[PT_SOFTE]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) err |= __put_user(signr, &sc->signal);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) err |= __put_user(handler, &sc->handler);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) if (set != NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) err |= __put_user(set->sig[0], &sc->oldmask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) * As above, but Transactional Memory is in use, so deliver sigcontexts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) * containing checkpointed and transactional register states.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) * To do this, we treclaim (done before entering here) to gather both sets of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) * registers and set up the 'normal' sigcontext registers with rolled-back
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) * register values such that a simple signal handler sees a correct
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) * checkpointed register state. If interested, a TM-aware sighandler can
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) * examine the transactional registers in the 2nd sigcontext to determine the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) * real origin of the signal.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) static long setup_tm_sigcontexts(struct sigcontext __user *sc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) struct sigcontext __user *tm_sc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) struct task_struct *tsk,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) int signr, sigset_t *set, unsigned long handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) unsigned long msr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) /* When CONFIG_ALTIVEC is set, we _always_ setup v_regs even if the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) * process never used altivec yet (MSR_VEC is zero in pt_regs of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) * the context). This is very important because we must ensure we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) * don't lose the VRSAVE content that may have been set prior to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) * the process doing its first vector operation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) * Userland shall check AT_HWCAP to know wether it can rely on the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) * v_regs pointer or not.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) #ifdef CONFIG_ALTIVEC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) elf_vrreg_t __user *v_regs = sigcontext_vmx_regs(sc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) elf_vrreg_t __user *tm_v_regs = sigcontext_vmx_regs(tm_sc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) struct pt_regs *regs = tsk->thread.regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) long err = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) BUG_ON(tsk != current);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) BUG_ON(!MSR_TM_ACTIVE(msr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) WARN_ON(tm_suspend_disabled);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) /* Restore checkpointed FP, VEC, and VSX bits from ckpt_regs as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) * it contains the correct FP, VEC, VSX state after we treclaimed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) * the transaction and giveup_all() was called on reclaiming.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) msr |= tsk->thread.ckpt_regs.msr & (MSR_FP | MSR_VEC | MSR_VSX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) #ifdef CONFIG_ALTIVEC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) err |= __put_user(v_regs, &sc->v_regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) err |= __put_user(tm_v_regs, &tm_sc->v_regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) /* save altivec registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) if (tsk->thread.used_vr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) /* Copy 33 vec registers (vr0..31 and vscr) to the stack */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) err |= __copy_to_user(v_regs, &tsk->thread.ckvr_state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 33 * sizeof(vector128));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) /* If VEC was enabled there are transactional VRs valid too,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) * else they're a copy of the checkpointed VRs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) if (msr & MSR_VEC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) err |= __copy_to_user(tm_v_regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) &tsk->thread.vr_state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 33 * sizeof(vector128));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) err |= __copy_to_user(tm_v_regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) &tsk->thread.ckvr_state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 33 * sizeof(vector128));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) /* set MSR_VEC in the MSR value in the frame to indicate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) * that sc->v_reg contains valid data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) msr |= MSR_VEC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) /* We always copy to/from vrsave, it's 0 if we don't have or don't
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) * use altivec.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) if (cpu_has_feature(CPU_FTR_ALTIVEC))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) tsk->thread.ckvrsave = mfspr(SPRN_VRSAVE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) err |= __put_user(tsk->thread.ckvrsave, (u32 __user *)&v_regs[33]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) if (msr & MSR_VEC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) err |= __put_user(tsk->thread.vrsave,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) (u32 __user *)&tm_v_regs[33]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) err |= __put_user(tsk->thread.ckvrsave,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) (u32 __user *)&tm_v_regs[33]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) #else /* CONFIG_ALTIVEC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) err |= __put_user(0, &sc->v_regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) err |= __put_user(0, &tm_sc->v_regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) #endif /* CONFIG_ALTIVEC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) /* copy fpr regs and fpscr */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) err |= copy_ckfpr_to_user(&sc->fp_regs, tsk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) if (msr & MSR_FP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) err |= copy_fpr_to_user(&tm_sc->fp_regs, tsk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) err |= copy_ckfpr_to_user(&tm_sc->fp_regs, tsk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) #ifdef CONFIG_VSX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) * Copy VSX low doubleword to local buffer for formatting,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) * then out to userspace. Update v_regs to point after the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) * VMX data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) if (tsk->thread.used_vsr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) v_regs += ELF_NVRREG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) tm_v_regs += ELF_NVRREG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) err |= copy_ckvsx_to_user(v_regs, tsk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) if (msr & MSR_VSX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) err |= copy_vsx_to_user(tm_v_regs, tsk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) err |= copy_ckvsx_to_user(tm_v_regs, tsk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) /* set MSR_VSX in the MSR value in the frame to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) * indicate that sc->vs_reg) contains valid data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) msr |= MSR_VSX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) #endif /* CONFIG_VSX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) err |= __put_user(&sc->gp_regs, &sc->regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) err |= __put_user(&tm_sc->gp_regs, &tm_sc->regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) WARN_ON(!FULL_REGS(regs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) err |= __copy_to_user(&tm_sc->gp_regs, regs, GP_REGS_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) err |= __copy_to_user(&sc->gp_regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) &tsk->thread.ckpt_regs, GP_REGS_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) err |= __put_user(msr, &tm_sc->gp_regs[PT_MSR]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) err |= __put_user(msr, &sc->gp_regs[PT_MSR]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) err |= __put_user(signr, &sc->signal);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) err |= __put_user(handler, &sc->handler);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) if (set != NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) err |= __put_user(set->sig[0], &sc->oldmask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) * Restore the sigcontext from the signal frame.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) static long restore_sigcontext(struct task_struct *tsk, sigset_t *set, int sig,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) struct sigcontext __user *sc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) #ifdef CONFIG_ALTIVEC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) elf_vrreg_t __user *v_regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) unsigned long err = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) unsigned long save_r13 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) unsigned long msr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) struct pt_regs *regs = tsk->thread.regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) #ifdef CONFIG_VSX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) BUG_ON(tsk != current);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) /* If this is not a signal return, we preserve the TLS in r13 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) if (!sig)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) save_r13 = regs->gpr[13];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) /* copy the GPRs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) err |= __copy_from_user(regs->gpr, sc->gp_regs, sizeof(regs->gpr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) err |= __get_user(regs->nip, &sc->gp_regs[PT_NIP]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) /* get MSR separately, transfer the LE bit if doing signal return */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) err |= __get_user(msr, &sc->gp_regs[PT_MSR]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) if (sig)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) regs->msr = (regs->msr & ~MSR_LE) | (msr & MSR_LE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) err |= __get_user(regs->orig_gpr3, &sc->gp_regs[PT_ORIG_R3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) err |= __get_user(regs->ctr, &sc->gp_regs[PT_CTR]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) err |= __get_user(regs->link, &sc->gp_regs[PT_LNK]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) err |= __get_user(regs->xer, &sc->gp_regs[PT_XER]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) err |= __get_user(regs->ccr, &sc->gp_regs[PT_CCR]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) /* Don't allow userspace to set SOFTE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) set_trap_norestart(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) err |= __get_user(regs->dar, &sc->gp_regs[PT_DAR]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) err |= __get_user(regs->dsisr, &sc->gp_regs[PT_DSISR]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) err |= __get_user(regs->result, &sc->gp_regs[PT_RESULT]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) if (!sig)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) regs->gpr[13] = save_r13;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) if (set != NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) err |= __get_user(set->sig[0], &sc->oldmask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) * Force reload of FP/VEC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) * This has to be done before copying stuff into tsk->thread.fpr/vr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) * for the reasons explained in the previous comment.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1 | MSR_VEC | MSR_VSX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) #ifdef CONFIG_ALTIVEC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) err |= __get_user(v_regs, &sc->v_regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) if (v_regs && !access_ok(v_regs, 34 * sizeof(vector128)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) /* Copy 33 vec registers (vr0..31 and vscr) from the stack */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) if (v_regs != NULL && (msr & MSR_VEC) != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) err |= __copy_from_user(&tsk->thread.vr_state, v_regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 33 * sizeof(vector128));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) tsk->thread.used_vr = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) } else if (tsk->thread.used_vr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) memset(&tsk->thread.vr_state, 0, 33 * sizeof(vector128));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) /* Always get VRSAVE back */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) if (v_regs != NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) err |= __get_user(tsk->thread.vrsave, (u32 __user *)&v_regs[33]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) tsk->thread.vrsave = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) if (cpu_has_feature(CPU_FTR_ALTIVEC))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) mtspr(SPRN_VRSAVE, tsk->thread.vrsave);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) #endif /* CONFIG_ALTIVEC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) /* restore floating point */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) err |= copy_fpr_from_user(tsk, &sc->fp_regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) #ifdef CONFIG_VSX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) * Get additional VSX data. Update v_regs to point after the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) * VMX data. Copy VSX low doubleword from userspace to local
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) * buffer for formatting, then into the taskstruct.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) v_regs += ELF_NVRREG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) if ((msr & MSR_VSX) != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) err |= copy_vsx_from_user(tsk, v_regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) tsk->thread.used_vsr = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) for (i = 0; i < 32 ; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) tsk->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) * Restore the two sigcontexts from the frame of a transactional processes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) static long restore_tm_sigcontexts(struct task_struct *tsk,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) struct sigcontext __user *sc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) struct sigcontext __user *tm_sc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) #ifdef CONFIG_ALTIVEC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) elf_vrreg_t __user *v_regs, *tm_v_regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) unsigned long err = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) unsigned long msr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) struct pt_regs *regs = tsk->thread.regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) #ifdef CONFIG_VSX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) BUG_ON(tsk != current);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) if (tm_suspend_disabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) /* copy the GPRs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) err |= __copy_from_user(regs->gpr, tm_sc->gp_regs, sizeof(regs->gpr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) err |= __copy_from_user(&tsk->thread.ckpt_regs, sc->gp_regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) sizeof(regs->gpr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) * TFHAR is restored from the checkpointed 'wound-back' ucontext's NIP.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) * TEXASR was set by the signal delivery reclaim, as was TFIAR.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) * Users doing anything abhorrent like thread-switching w/ signals for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) * TM-Suspended code will have to back TEXASR/TFIAR up themselves.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) * For the case of getting a signal and simply returning from it,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) * we don't need to re-copy them here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) err |= __get_user(regs->nip, &tm_sc->gp_regs[PT_NIP]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) err |= __get_user(tsk->thread.tm_tfhar, &sc->gp_regs[PT_NIP]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) /* get MSR separately, transfer the LE bit if doing signal return */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) err |= __get_user(msr, &sc->gp_regs[PT_MSR]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) /* Don't allow reserved mode. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) if (MSR_TM_RESV(msr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) /* pull in MSR LE from user context */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) regs->msr = (regs->msr & ~MSR_LE) | (msr & MSR_LE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) /* The following non-GPR non-FPR non-VR state is also checkpointed: */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) err |= __get_user(regs->ctr, &tm_sc->gp_regs[PT_CTR]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) err |= __get_user(regs->link, &tm_sc->gp_regs[PT_LNK]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) err |= __get_user(regs->xer, &tm_sc->gp_regs[PT_XER]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) err |= __get_user(regs->ccr, &tm_sc->gp_regs[PT_CCR]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) err |= __get_user(tsk->thread.ckpt_regs.ctr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) &sc->gp_regs[PT_CTR]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) err |= __get_user(tsk->thread.ckpt_regs.link,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) &sc->gp_regs[PT_LNK]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) err |= __get_user(tsk->thread.ckpt_regs.xer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) &sc->gp_regs[PT_XER]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) err |= __get_user(tsk->thread.ckpt_regs.ccr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) &sc->gp_regs[PT_CCR]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) /* Don't allow userspace to set SOFTE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) set_trap_norestart(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) /* These regs are not checkpointed; they can go in 'regs'. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) err |= __get_user(regs->dar, &sc->gp_regs[PT_DAR]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) err |= __get_user(regs->dsisr, &sc->gp_regs[PT_DSISR]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) err |= __get_user(regs->result, &sc->gp_regs[PT_RESULT]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) * Force reload of FP/VEC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) * This has to be done before copying stuff into tsk->thread.fpr/vr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) * for the reasons explained in the previous comment.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1 | MSR_VEC | MSR_VSX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) #ifdef CONFIG_ALTIVEC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) err |= __get_user(v_regs, &sc->v_regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) err |= __get_user(tm_v_regs, &tm_sc->v_regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) if (v_regs && !access_ok(v_regs, 34 * sizeof(vector128)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) if (tm_v_regs && !access_ok(tm_v_regs, 34 * sizeof(vector128)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) /* Copy 33 vec registers (vr0..31 and vscr) from the stack */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) if (v_regs != NULL && tm_v_regs != NULL && (msr & MSR_VEC) != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) err |= __copy_from_user(&tsk->thread.ckvr_state, v_regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) 33 * sizeof(vector128));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) err |= __copy_from_user(&tsk->thread.vr_state, tm_v_regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) 33 * sizeof(vector128));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) current->thread.used_vr = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) else if (tsk->thread.used_vr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) memset(&tsk->thread.vr_state, 0, 33 * sizeof(vector128));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) memset(&tsk->thread.ckvr_state, 0, 33 * sizeof(vector128));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) /* Always get VRSAVE back */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) if (v_regs != NULL && tm_v_regs != NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) err |= __get_user(tsk->thread.ckvrsave,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) (u32 __user *)&v_regs[33]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) err |= __get_user(tsk->thread.vrsave,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) (u32 __user *)&tm_v_regs[33]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) tsk->thread.vrsave = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) tsk->thread.ckvrsave = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) if (cpu_has_feature(CPU_FTR_ALTIVEC))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) mtspr(SPRN_VRSAVE, tsk->thread.vrsave);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) #endif /* CONFIG_ALTIVEC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) /* restore floating point */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) err |= copy_fpr_from_user(tsk, &tm_sc->fp_regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) err |= copy_ckfpr_from_user(tsk, &sc->fp_regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) #ifdef CONFIG_VSX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) * Get additional VSX data. Update v_regs to point after the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) * VMX data. Copy VSX low doubleword from userspace to local
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) * buffer for formatting, then into the taskstruct.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) if (v_regs && ((msr & MSR_VSX) != 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) v_regs += ELF_NVRREG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) tm_v_regs += ELF_NVRREG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) err |= copy_vsx_from_user(tsk, tm_v_regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) err |= copy_ckvsx_from_user(tsk, v_regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) tsk->thread.used_vsr = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) for (i = 0; i < 32 ; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) tsk->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) tsk->thread.ckfp_state.fpr[i][TS_VSRLOWOFFSET] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) tm_enable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) /* Make sure the transaction is marked as failed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) tsk->thread.tm_texasr |= TEXASR_FS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) * Disabling preemption, since it is unsafe to be preempted
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) * with MSR[TS] set without recheckpointing.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) preempt_disable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) /* pull in MSR TS bits from user context */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) regs->msr |= msr & MSR_TS_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) * Ensure that TM is enabled in regs->msr before we leave the signal
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) * handler. It could be the case that (a) user disabled the TM bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) * through the manipulation of the MSR bits in uc_mcontext or (b) the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) * TM bit was disabled because a sufficient number of context switches
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) * happened whilst in the signal handler and load_tm overflowed,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) * disabling the TM bit. In either case we can end up with an illegal
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) * TM state leading to a TM Bad Thing when we return to userspace.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) * CAUTION:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) * After regs->MSR[TS] being updated, make sure that get_user(),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) * put_user() or similar functions are *not* called. These
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) * functions can generate page faults which will cause the process
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) * to be de-scheduled with MSR[TS] set but without calling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) * tm_recheckpoint(). This can cause a bug.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) regs->msr |= MSR_TM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) /* This loads the checkpointed FP/VEC state, if used */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) tm_recheckpoint(&tsk->thread);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) msr_check_and_set(msr & (MSR_FP | MSR_VEC));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) if (msr & MSR_FP) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) load_fp_state(&tsk->thread.fp_state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) regs->msr |= (MSR_FP | tsk->thread.fpexc_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) if (msr & MSR_VEC) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) load_vr_state(&tsk->thread.vr_state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) regs->msr |= MSR_VEC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) preempt_enable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) * Setup the trampoline code on the stack
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) static long setup_trampoline(unsigned int syscall, unsigned int __user *tramp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) long err = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) /* bctrl # call the handler */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) err |= __put_user(PPC_INST_BCTRL, &tramp[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) /* addi r1, r1, __SIGNAL_FRAMESIZE # Pop the dummy stackframe */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) err |= __put_user(PPC_INST_ADDI | __PPC_RT(R1) | __PPC_RA(R1) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) (__SIGNAL_FRAMESIZE & 0xffff), &tramp[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) /* li r0, __NR_[rt_]sigreturn| */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) err |= __put_user(PPC_INST_ADDI | (syscall & 0xffff), &tramp[2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) /* sc */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) err |= __put_user(PPC_INST_SC, &tramp[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) /* Minimal traceback info */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) for (i=TRAMP_TRACEBACK; i < TRAMP_SIZE ;i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) err |= __put_user(0, &tramp[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) if (!err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) flush_icache_range((unsigned long) &tramp[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) (unsigned long) &tramp[TRAMP_SIZE]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) * Userspace code may pass a ucontext which doesn't include VSX added
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) * at the end. We need to check for this case.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) #define UCONTEXTSIZEWITHOUTVSX \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) (sizeof(struct ucontext) - 32*sizeof(long))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) * Handle {get,set,swap}_context operations
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) SYSCALL_DEFINE3(swapcontext, struct ucontext __user *, old_ctx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) struct ucontext __user *, new_ctx, long, ctx_size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) sigset_t set;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) unsigned long new_msr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) int ctx_has_vsx_region = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) if (new_ctx &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) get_user(new_msr, &new_ctx->uc_mcontext.gp_regs[PT_MSR]))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) * Check that the context is not smaller than the original
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) * size (with VMX but without VSX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) if (ctx_size < UCONTEXTSIZEWITHOUTVSX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) * If the new context state sets the MSR VSX bits but
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) * it doesn't provide VSX state.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) if ((ctx_size < sizeof(struct ucontext)) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) (new_msr & MSR_VSX))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) /* Does the context have enough room to store VSX data? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) if (ctx_size >= sizeof(struct ucontext))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) ctx_has_vsx_region = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) if (old_ctx != NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) if (!access_ok(old_ctx, ctx_size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) || setup_sigcontext(&old_ctx->uc_mcontext, current, 0, NULL, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) ctx_has_vsx_region)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) || __copy_to_user(&old_ctx->uc_sigmask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) ¤t->blocked, sizeof(sigset_t)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) if (new_ctx == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) if (!access_ok(new_ctx, ctx_size) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) fault_in_pages_readable((u8 __user *)new_ctx, ctx_size))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) * If we get a fault copying the context into the kernel's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) * image of the user's registers, we can't just return -EFAULT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) * because the user's registers will be corrupted. For instance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) * the NIP value may have been updated but not some of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) * other registers. Given that we have done the access_ok
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) * and successfully read the first and last bytes of the region
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) * above, this should only happen in an out-of-memory situation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) * or if another thread unmaps the region containing the context.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) * We kill the task with a SIGSEGV in this situation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) if (__copy_from_user(&set, &new_ctx->uc_sigmask, sizeof(set)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) do_exit(SIGSEGV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) set_current_blocked(&set);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) if (restore_sigcontext(current, NULL, 0, &new_ctx->uc_mcontext))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) do_exit(SIGSEGV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) /* This returns like rt_sigreturn */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) set_thread_flag(TIF_RESTOREALL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) * Do a signal return; undo the signal stack.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) SYSCALL_DEFINE0(rt_sigreturn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) struct pt_regs *regs = current_pt_regs();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) struct ucontext __user *uc = (struct ucontext __user *)regs->gpr[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) sigset_t set;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) unsigned long msr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) /* Always make any pending restarted system calls return -EINTR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) current->restart_block.fn = do_no_restart_syscall;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) if (!access_ok(uc, sizeof(*uc)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) goto badframe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) if (__copy_from_user(&set, &uc->uc_sigmask, sizeof(set)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) goto badframe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) set_current_blocked(&set);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) * If there is a transactional state then throw it away.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) * The purpose of a sigreturn is to destroy all traces of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) * signal frame, this includes any transactional state created
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) * within in. We only check for suspended as we can never be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) * active in the kernel, we are active, there is nothing better to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) * do than go ahead and Bad Thing later.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) * The cause is not important as there will never be a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) * recheckpoint so it's not user visible.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) if (MSR_TM_SUSPENDED(mfmsr()))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) tm_reclaim_current(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) * Disable MSR[TS] bit also, so, if there is an exception in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) * code below (as a page fault in copy_ckvsx_to_user()), it does
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) * not recheckpoint this task if there was a context switch inside
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) * the exception.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) * A major page fault can indirectly call schedule(). A reschedule
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) * process in the middle of an exception can have a side effect
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) * (Changing the CPU MSR[TS] state), since schedule() is called
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) * with the CPU MSR[TS] disable and returns with MSR[TS]=Suspended
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) * (switch_to() calls tm_recheckpoint() for the 'new' process). In
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) * this case, the process continues to be the same in the CPU, but
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) * the CPU state just changed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) * This can cause a TM Bad Thing, since the MSR in the stack will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) * have the MSR[TS]=0, and this is what will be used to RFID.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) * Clearing MSR[TS] state here will avoid a recheckpoint if there
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) * is any process reschedule in kernel space. The MSR[TS] state
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) * does not need to be saved also, since it will be replaced with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) * the MSR[TS] that came from user context later, at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) * restore_tm_sigcontexts.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) regs->msr &= ~MSR_TS_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) if (__get_user(msr, &uc->uc_mcontext.gp_regs[PT_MSR]))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) goto badframe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) if (MSR_TM_ACTIVE(msr)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) /* We recheckpoint on return. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) struct ucontext __user *uc_transact;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) /* Trying to start TM on non TM system */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) if (!cpu_has_feature(CPU_FTR_TM))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) goto badframe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) if (__get_user(uc_transact, &uc->uc_link))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) goto badframe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) if (restore_tm_sigcontexts(current, &uc->uc_mcontext,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) &uc_transact->uc_mcontext))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) goto badframe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) * Fall through, for non-TM restore
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) * Unset MSR[TS] on the thread regs since MSR from user
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) * context does not have MSR active, and recheckpoint was
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) * not called since restore_tm_sigcontexts() was not called
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) * also.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) * If not unsetting it, the code can RFID to userspace with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) * MSR[TS] set, but without CPU in the proper state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) * causing a TM bad thing.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) current->thread.regs->msr &= ~MSR_TS_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) if (restore_sigcontext(current, NULL, 1, &uc->uc_mcontext))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) goto badframe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) if (restore_altstack(&uc->uc_stack))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) goto badframe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) set_thread_flag(TIF_RESTOREALL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) badframe:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) if (show_unhandled_signals)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) printk_ratelimited(regs->msr & MSR_64BIT ? fmt64 : fmt32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) current->comm, current->pid, "rt_sigreturn",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) (long)uc, regs->nip, regs->link);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) force_sig(SIGSEGV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) int handle_rt_signal64(struct ksignal *ksig, sigset_t *set,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) struct task_struct *tsk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) struct rt_sigframe __user *frame;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) unsigned long newsp = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) long err = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) struct pt_regs *regs = tsk->thread.regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) /* Save the thread's msr before get_tm_stackpointer() changes it */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) unsigned long msr = regs->msr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) BUG_ON(tsk != current);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) frame = get_sigframe(ksig, get_tm_stackpointer(tsk), sizeof(*frame), 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) if (unlikely(frame == NULL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) goto badframe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) err |= __put_user(&frame->info, &frame->pinfo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) err |= __put_user(&frame->uc, &frame->puc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) err |= copy_siginfo_to_user(&frame->info, &ksig->info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) goto badframe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) /* Create the ucontext. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) err |= __put_user(0, &frame->uc.uc_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) err |= __save_altstack(&frame->uc.uc_stack, regs->gpr[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) if (MSR_TM_ACTIVE(msr)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) /* The ucontext_t passed to userland points to the second
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) * ucontext_t (for transactional state) with its uc_link ptr.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) err |= __put_user(&frame->uc_transact, &frame->uc.uc_link);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) err |= setup_tm_sigcontexts(&frame->uc.uc_mcontext,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) &frame->uc_transact.uc_mcontext,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) tsk, ksig->sig, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) (unsigned long)ksig->ka.sa.sa_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) msr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) err |= __put_user(0, &frame->uc.uc_link);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) err |= setup_sigcontext(&frame->uc.uc_mcontext, tsk, ksig->sig,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) NULL, (unsigned long)ksig->ka.sa.sa_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) goto badframe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) /* Make sure signal handler doesn't get spurious FP exceptions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) tsk->thread.fp_state.fpscr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) /* Set up to return from userspace. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) if (vdso64_rt_sigtramp && tsk->mm->context.vdso_base) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) regs->nip = tsk->mm->context.vdso_base + vdso64_rt_sigtramp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) err |= setup_trampoline(__NR_rt_sigreturn, &frame->tramp[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) goto badframe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) regs->nip = (unsigned long) &frame->tramp[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) /* Allocate a dummy caller frame for the signal handler. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) newsp = ((unsigned long)frame) - __SIGNAL_FRAMESIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) err |= put_user(regs->gpr[1], (unsigned long __user *)newsp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) /* Set up "regs" so we "return" to the signal handler. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) if (is_elf2_task()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) regs->ctr = (unsigned long) ksig->ka.sa.sa_handler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) regs->gpr[12] = regs->ctr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) /* Handler is *really* a pointer to the function descriptor for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) * the signal routine. The first entry in the function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) * descriptor is the entry address of signal and the second
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) * entry is the TOC value we need to use.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) func_descr_t __user *funct_desc_ptr =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) (func_descr_t __user *) ksig->ka.sa.sa_handler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) err |= get_user(regs->ctr, &funct_desc_ptr->entry);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) err |= get_user(regs->gpr[2], &funct_desc_ptr->toc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) /* enter the signal handler in native-endian mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) regs->msr &= ~MSR_LE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) regs->msr |= (MSR_KERNEL & MSR_LE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) regs->gpr[1] = newsp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) regs->gpr[3] = ksig->sig;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) regs->result = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) if (ksig->ka.sa.sa_flags & SA_SIGINFO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) err |= get_user(regs->gpr[4], (unsigned long __user *)&frame->pinfo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) err |= get_user(regs->gpr[5], (unsigned long __user *)&frame->puc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) regs->gpr[6] = (unsigned long) frame;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) regs->gpr[4] = (unsigned long)&frame->uc.uc_mcontext;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) goto badframe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) badframe:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) if (show_unhandled_signals)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) printk_ratelimited(regs->msr & MSR_64BIT ? fmt64 : fmt32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) tsk->comm, tsk->pid, "setup_rt_frame",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) (long)frame, regs->nip, regs->link);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) }