^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #include <linux/serial.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) #include <linux/serial_8250.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) #include <linux/serial_core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/console.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/of_address.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/serial_reg.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <asm/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <asm/mmu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <asm/prom.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <asm/serial.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <asm/udbg.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <asm/pci-bridge.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <asm/ppc-pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #undef DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #ifdef DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define DBG(fmt...) do { printk(fmt); } while(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define DBG(fmt...) do { } while(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define MAX_LEGACY_SERIAL_PORTS 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) static struct plat_serial8250_port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) legacy_serial_ports[MAX_LEGACY_SERIAL_PORTS+1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) static struct legacy_serial_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) struct device_node *np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) unsigned int speed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) unsigned int clock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) int irq_check_parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) phys_addr_t taddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) } legacy_serial_infos[MAX_LEGACY_SERIAL_PORTS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) static const struct of_device_id legacy_serial_parents[] __initconst = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) {.type = "soc",},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) {.type = "tsi-bridge",},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) {.type = "opb", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) {.compatible = "ibm,opb",},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) {.compatible = "simple-bus",},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) {.compatible = "wrs,epld-localbus",},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) static unsigned int legacy_serial_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) static int legacy_serial_console = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) static const upf_t legacy_port_flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) UPF_SHARE_IRQ | UPF_FIXED_PORT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) static unsigned int tsi_serial_in(struct uart_port *p, int offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) unsigned int tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) offset = offset << p->regshift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) if (offset == UART_IIR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) tmp = readl(p->membase + (UART_IIR & ~3));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) return (tmp >> 16) & 0xff; /* UART_IIR % 4 == 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) return readb(p->membase + offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) static void tsi_serial_out(struct uart_port *p, int offset, int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) offset = offset << p->regshift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) if (!((offset == UART_IER) && (value & UART_IER_UUE)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) writeb(value, p->membase + offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) static int __init add_legacy_port(struct device_node *np, int want_index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) int iotype, phys_addr_t base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) phys_addr_t taddr, unsigned long irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) upf_t flags, int irq_check_parent)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) const __be32 *clk, *spd, *rs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) u32 clock = BASE_BAUD * 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) u32 shift = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) int index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) /* get clock freq. if present */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) clk = of_get_property(np, "clock-frequency", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) if (clk && *clk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) clock = be32_to_cpup(clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) /* get default speed if present */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) spd = of_get_property(np, "current-speed", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) /* get register shift if present */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) rs = of_get_property(np, "reg-shift", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) if (rs && *rs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) shift = be32_to_cpup(rs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) /* If we have a location index, then try to use it */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) if (want_index >= 0 && want_index < MAX_LEGACY_SERIAL_PORTS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) index = want_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) index = legacy_serial_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) /* if our index is still out of range, that mean that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) * array is full, we could scan for a free slot but that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) * make little sense to bother, just skip the port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) if (index >= MAX_LEGACY_SERIAL_PORTS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) if (index >= legacy_serial_count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) legacy_serial_count = index + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) /* Check if there is a port who already claimed our slot */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) if (legacy_serial_infos[index].np != NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) /* if we still have some room, move it, else override */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) if (legacy_serial_count < MAX_LEGACY_SERIAL_PORTS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) printk(KERN_DEBUG "Moved legacy port %d -> %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) index, legacy_serial_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) legacy_serial_ports[legacy_serial_count] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) legacy_serial_ports[index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) legacy_serial_infos[legacy_serial_count] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) legacy_serial_infos[index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) legacy_serial_count++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) printk(KERN_DEBUG "Replacing legacy port %d\n", index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) /* Now fill the entry */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) memset(&legacy_serial_ports[index], 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) sizeof(struct plat_serial8250_port));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) if (iotype == UPIO_PORT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) legacy_serial_ports[index].iobase = base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) legacy_serial_ports[index].mapbase = base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) legacy_serial_ports[index].iotype = iotype;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) legacy_serial_ports[index].uartclk = clock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) legacy_serial_ports[index].irq = irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) legacy_serial_ports[index].flags = flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) legacy_serial_ports[index].regshift = shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) legacy_serial_infos[index].taddr = taddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) legacy_serial_infos[index].np = of_node_get(np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) legacy_serial_infos[index].clock = clock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) legacy_serial_infos[index].speed = spd ? be32_to_cpup(spd) : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) legacy_serial_infos[index].irq_check_parent = irq_check_parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) if (iotype == UPIO_TSI) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) legacy_serial_ports[index].serial_in = tsi_serial_in;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) legacy_serial_ports[index].serial_out = tsi_serial_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) printk(KERN_DEBUG "Found legacy serial port %d for %pOF\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) index, np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) printk(KERN_DEBUG " %s=%llx, taddr=%llx, irq=%lx, clk=%d, speed=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) (iotype == UPIO_PORT) ? "port" : "mem",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) (unsigned long long)base, (unsigned long long)taddr, irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) legacy_serial_ports[index].uartclk,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) legacy_serial_infos[index].speed);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) return index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) static int __init add_legacy_soc_port(struct device_node *np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) struct device_node *soc_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) u64 addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) const __be32 *addrp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) struct device_node *tsi = of_get_parent(np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) /* We only support ports that have a clock frequency properly
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) * encoded in the device-tree.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) if (of_get_property(np, "clock-frequency", NULL) == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) /* if reg-offset don't try to use it */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) if ((of_get_property(np, "reg-offset", NULL) != NULL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) /* if rtas uses this device, don't try to use it as well */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) if (of_get_property(np, "used-by-rtas", NULL) != NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) /* Get the address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) addrp = of_get_address(soc_dev, 0, NULL, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) if (addrp == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) addr = of_translate_address(soc_dev, addrp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) if (addr == OF_BAD_ADDR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) /* Add port, irq will be dealt with later. We passed a translated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) * IO port value. It will be fixed up later along with the irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) if (of_node_is_type(tsi, "tsi-bridge"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) return add_legacy_port(np, -1, UPIO_TSI, addr, addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 0, legacy_port_flags, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) return add_legacy_port(np, -1, UPIO_MEM, addr, addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 0, legacy_port_flags, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) static int __init add_legacy_isa_port(struct device_node *np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) struct device_node *isa_brg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) const __be32 *reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) const char *typep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) int index = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) u64 taddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) DBG(" -> add_legacy_isa_port(%pOF)\n", np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) /* Get the ISA port number */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) reg = of_get_property(np, "reg", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) if (reg == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) /* Verify it's an IO port, we don't support anything else */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) if (!(be32_to_cpu(reg[0]) & 0x00000001))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) /* Now look for an "ibm,aix-loc" property that gives us ordering
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) * if any...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) typep = of_get_property(np, "ibm,aix-loc", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) /* If we have a location index, then use it */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) if (typep && *typep == 'S')
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) index = simple_strtol(typep+1, NULL, 0) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) /* Translate ISA address. If it fails, we still register the port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) * with no translated address so that it can be picked up as an IO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) * port later by the serial driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) * Note: Don't even try on P8 lpc, we know it's not directly mapped
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) if (!of_device_is_compatible(isa_brg, "ibm,power8-lpc") ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) of_get_property(isa_brg, "ranges", NULL)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) taddr = of_translate_address(np, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) if (taddr == OF_BAD_ADDR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) taddr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) taddr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) /* Add port, irq will be dealt with later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) return add_legacy_port(np, index, UPIO_PORT, be32_to_cpu(reg[1]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) taddr, 0, legacy_port_flags, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) #ifdef CONFIG_PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) static int __init add_legacy_pci_port(struct device_node *np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) struct device_node *pci_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) u64 addr, base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) const __be32 *addrp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) unsigned int flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) int iotype, index = -1, lindex = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) DBG(" -> add_legacy_pci_port(%pOF)\n", np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) /* We only support ports that have a clock frequency properly
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) * encoded in the device-tree (that is have an fcode). Anything
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) * else can't be used that early and will be normally probed by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) * the generic 8250_pci driver later on. The reason is that 8250
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) * compatible UARTs on PCI need all sort of quirks (port offsets
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) * etc...) that this code doesn't know about
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) if (of_get_property(np, "clock-frequency", NULL) == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) /* Get the PCI address. Assume BAR 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) addrp = of_get_pci_address(pci_dev, 0, NULL, &flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) if (addrp == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) /* We only support BAR 0 for now */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) iotype = (flags & IORESOURCE_MEM) ? UPIO_MEM : UPIO_PORT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) addr = of_translate_address(pci_dev, addrp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) if (addr == OF_BAD_ADDR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) /* Set the IO base to the same as the translated address for MMIO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) * or to the domain local IO base for PIO (it will be fixed up later)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) if (iotype == UPIO_MEM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) base = addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) base = of_read_number(&addrp[2], 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) /* Try to guess an index... If we have subdevices of the pci dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) * we get to their "reg" property
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) if (np != pci_dev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) const __be32 *reg = of_get_property(np, "reg", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) if (reg && (be32_to_cpup(reg) < 4))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) index = lindex = be32_to_cpup(reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) /* Local index means it's the Nth port in the PCI chip. Unfortunately
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) * the offset to add here is device specific. We know about those
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) * EXAR ports and we default to the most common case. If your UART
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) * doesn't work for these settings, you'll have to add your own special
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) * cases here
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) if (of_device_is_compatible(pci_dev, "pci13a8,152") ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) of_device_is_compatible(pci_dev, "pci13a8,154") ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) of_device_is_compatible(pci_dev, "pci13a8,158")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) addr += 0x200 * lindex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) base += 0x200 * lindex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) addr += 8 * lindex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) base += 8 * lindex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) /* Add port, irq will be dealt with later. We passed a translated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) * IO port value. It will be fixed up later along with the irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) return add_legacy_port(np, index, iotype, base, addr, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) legacy_port_flags, np != pci_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) static void __init setup_legacy_serial_console(int console)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) struct legacy_serial_info *info = &legacy_serial_infos[console];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) struct plat_serial8250_port *port = &legacy_serial_ports[console];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) void __iomem *addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) unsigned int stride;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) stride = 1 << port->regshift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) /* Check if a translated MMIO address has been found */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) if (info->taddr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) addr = ioremap(info->taddr, 0x1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) if (addr == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) udbg_uart_init_mmio(addr, stride);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) /* Check if it's PIO and we support untranslated PIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) if (port->iotype == UPIO_PORT && isa_io_special)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) udbg_uart_init_pio(port->iobase, stride);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) /* Try to query the current speed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) if (info->speed == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) info->speed = udbg_probe_uart_speed(info->clock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) /* Set it up */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) DBG("default console speed = %d\n", info->speed);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) udbg_uart_setup(info->speed, info->clock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) * This is called very early, as part of setup_system() or eventually
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) * setup_arch(), basically before anything else in this file. This function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) * will try to build a list of all the available 8250-compatible serial ports
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) * in the machine using the Open Firmware device-tree. It currently only deals
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) * with ISA and PCI busses but could be extended. It allows a very early boot
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) * console to be initialized, that list is also used later to provide 8250 with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) * the machine non-PCI ports and to properly pick the default console port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) void __init find_legacy_serial_ports(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) struct device_node *np, *stdout = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) const char *path;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) int index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) DBG(" -> find_legacy_serial_port()\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) /* Now find out if one of these is out firmware console */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) path = of_get_property(of_chosen, "linux,stdout-path", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) if (path == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) path = of_get_property(of_chosen, "stdout-path", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) if (path != NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) stdout = of_find_node_by_path(path);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) if (stdout)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) DBG("stdout is %pOF\n", stdout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) DBG(" no linux,stdout-path !\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) /* Iterate over all the 16550 ports, looking for known parents */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) for_each_compatible_node(np, "serial", "ns16550") {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) struct device_node *parent = of_get_parent(np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) if (!parent)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) if (of_match_node(legacy_serial_parents, parent) != NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) if (of_device_is_available(np)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) index = add_legacy_soc_port(np, np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) if (index >= 0 && np == stdout)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) legacy_serial_console = index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) of_node_put(parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) /* Next, fill our array with ISA ports */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) for_each_node_by_type(np, "serial") {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) struct device_node *isa = of_get_parent(np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) if (of_node_name_eq(isa, "isa") || of_node_name_eq(isa, "lpc")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) if (of_device_is_available(np)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) index = add_legacy_isa_port(np, isa);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) if (index >= 0 && np == stdout)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) legacy_serial_console = index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) of_node_put(isa);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) #ifdef CONFIG_PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) /* Next, try to locate PCI ports */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) for (np = NULL; (np = of_find_all_nodes(np));) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) struct device_node *pci, *parent = of_get_parent(np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) if (of_node_name_eq(parent, "isa")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) of_node_put(parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) if (!of_node_name_eq(np, "serial") &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) !of_node_is_type(np, "serial")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) of_node_put(parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) /* Check for known pciclass, and also check whether we have
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) * a device with child nodes for ports or not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) if (of_device_is_compatible(np, "pciclass,0700") ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) of_device_is_compatible(np, "pciclass,070002"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) pci = np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) else if (of_device_is_compatible(parent, "pciclass,0700") ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) of_device_is_compatible(parent, "pciclass,070002"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) pci = parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) of_node_put(parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) index = add_legacy_pci_port(np, pci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) if (index >= 0 && np == stdout)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) legacy_serial_console = index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) of_node_put(parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) DBG("legacy_serial_console = %d\n", legacy_serial_console);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) if (legacy_serial_console >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) setup_legacy_serial_console(legacy_serial_console);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) DBG(" <- find_legacy_serial_port()\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) static struct platform_device serial_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) .name = "serial8250",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) .id = PLAT8250_DEV_PLATFORM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) .platform_data = legacy_serial_ports,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) static void __init fixup_port_irq(int index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) struct device_node *np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) struct plat_serial8250_port *port)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) unsigned int virq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) DBG("fixup_port_irq(%d)\n", index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) virq = irq_of_parse_and_map(np, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) if (!virq && legacy_serial_infos[index].irq_check_parent) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) np = of_get_parent(np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) if (np == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) virq = irq_of_parse_and_map(np, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) of_node_put(np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) if (!virq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) port->irq = virq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) #ifdef CONFIG_SERIAL_8250_FSL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) if (of_device_is_compatible(np, "fsl,ns16550")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) port->handle_irq = fsl8250_handle_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_8250_CONSOLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) static void __init fixup_port_pio(int index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) struct device_node *np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) struct plat_serial8250_port *port)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) #ifdef CONFIG_PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) struct pci_controller *hose;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) DBG("fixup_port_pio(%d)\n", index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) hose = pci_find_hose_for_OF_device(np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) if (hose) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) unsigned long offset = (unsigned long)hose->io_base_virt -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) #ifdef CONFIG_PPC64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) pci_io_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) isa_io_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) DBG("port %d, IO %lx -> %lx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) index, port->iobase, port->iobase + offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) port->iobase += offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) static void __init fixup_port_mmio(int index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) struct device_node *np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) struct plat_serial8250_port *port)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) DBG("fixup_port_mmio(%d)\n", index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) port->membase = ioremap(port->mapbase, 0x100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) * This is called as an arch initcall, hopefully before the PCI bus is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) * probed and/or the 8250 driver loaded since we need to register our
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) * platform devices before 8250 PCI ones are detected as some of them
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) * must properly "override" the platform ones.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) * This function fixes up the interrupt value for platform ports as it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) * couldn't be done earlier before interrupt maps have been parsed. It
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) * also "corrects" the IO address for PIO ports for the same reason,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) * since earlier, the PHBs virtual IO space wasn't assigned yet. It then
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) * registers all those platform ports for use by the 8250 driver when it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) * finally loads.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) static int __init serial_dev_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) if (legacy_serial_count == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) * Before we register the platform serial devices, we need
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) * to fixup their interrupts and their IO ports.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) DBG("Fixing serial ports interrupts and IO ports ...\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) for (i = 0; i < legacy_serial_count; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) struct plat_serial8250_port *port = &legacy_serial_ports[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) struct device_node *np = legacy_serial_infos[i].np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) if (!port->irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) fixup_port_irq(i, np, port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) if (port->iotype == UPIO_PORT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) fixup_port_pio(i, np, port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) if ((port->iotype == UPIO_MEM) || (port->iotype == UPIO_TSI))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) fixup_port_mmio(i, np, port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) DBG("Registering platform serial ports\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) return platform_device_register(&serial_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) device_initcall(serial_dev_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) #ifdef CONFIG_SERIAL_8250_CONSOLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) * This is called very early, as part of console_init() (typically just after
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) * time_init()). This function is respondible for trying to find a good
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) * default console on serial ports. It tries to match the open firmware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) * default output with one of the available serial console drivers that have
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) * been probed earlier by find_legacy_serial_ports()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) static int __init check_legacy_serial_console(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) struct device_node *prom_stdout = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) int i, speed = 0, offset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) const char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) const __be32 *spd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) DBG(" -> check_legacy_serial_console()\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) /* The user has requested a console so this is already set up. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) if (strstr(boot_command_line, "console=")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) DBG(" console was specified !\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) if (!of_chosen) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) DBG(" of_chosen is NULL !\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) if (legacy_serial_console < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) DBG(" legacy_serial_console not found !\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) /* We are getting a weird phandle from OF ... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) /* ... So use the full path instead */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) name = of_get_property(of_chosen, "linux,stdout-path", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) if (name == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) name = of_get_property(of_chosen, "stdout-path", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) if (name == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) DBG(" no stdout-path !\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) prom_stdout = of_find_node_by_path(name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) if (!prom_stdout) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) DBG(" can't find stdout package %s !\n", name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) DBG("stdout is %pOF\n", prom_stdout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) name = of_get_property(prom_stdout, "name", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) if (!name) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) DBG(" stdout package has no name !\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) goto not_found;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) spd = of_get_property(prom_stdout, "current-speed", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) if (spd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) speed = be32_to_cpup(spd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) if (strcmp(name, "serial") != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) goto not_found;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) /* Look for it in probed array */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) for (i = 0; i < legacy_serial_count; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) if (prom_stdout != legacy_serial_infos[i].np)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) offset = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) speed = legacy_serial_infos[i].speed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) if (i >= legacy_serial_count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) goto not_found;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) of_node_put(prom_stdout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) DBG("Found serial console at ttyS%d\n", offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) if (speed) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) static char __initdata opt[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) sprintf(opt, "%d", speed);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) return add_preferred_console("ttyS", offset, opt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) return add_preferred_console("ttyS", offset, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) not_found:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) DBG("No preferred console found !\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) of_node_put(prom_stdout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) console_initcall(check_legacy_serial_console);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) #endif /* CONFIG_SERIAL_8250_CONSOLE */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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