Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Common time prototypes and such for all ppc machines.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Written by Cort Dougan (cort@cs.nmt.edu) to merge
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * Paul Mackerras' version and mine for PReP and Pmac.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #ifndef __POWERPC_TIME_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #define __POWERPC_TIME_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #ifdef __KERNEL__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/percpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <asm/processor.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <asm/cpu_has_feature.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) /* time.c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) extern unsigned long tb_ticks_per_jiffy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) extern unsigned long tb_ticks_per_usec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) extern unsigned long tb_ticks_per_sec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) extern struct clock_event_device decrementer_clockevent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) extern void generic_calibrate_decr(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) /* Some sane defaults: 125 MHz timebase, 1GHz processor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) extern unsigned long ppc_proc_freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define DEFAULT_PROC_FREQ	(DEFAULT_TB_FREQ * 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) extern unsigned long ppc_tb_freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define DEFAULT_TB_FREQ		125000000UL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) extern bool tb_invalid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) struct div_result {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	u64 result_high;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	u64 result_low;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) /* For compatibility, get_tbl() is defined as get_tb() on ppc64 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) static inline unsigned long get_tbl(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	return mftb();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) static inline u64 get_vtb(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) #ifdef CONFIG_PPC_BOOK3S_64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	if (cpu_has_feature(CPU_FTR_ARCH_207S))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 		return mfspr(SPRN_VTB);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) static inline u64 get_tb(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	unsigned int tbhi, tblo, tbhi2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	if (IS_ENABLED(CONFIG_PPC64))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 		return mftb();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 		tbhi = mftbu();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 		tblo = mftb();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 		tbhi2 = mftbu();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	} while (tbhi != tbhi2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	return ((u64)tbhi << 32) | tblo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) static inline void set_tb(unsigned int upper, unsigned int lower)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	mtspr(SPRN_TBWL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	mtspr(SPRN_TBWU, upper);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	mtspr(SPRN_TBWL, lower);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) /* Accessor functions for the decrementer register.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80)  * The 4xx doesn't even have a decrementer.  I tried to use the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81)  * generic timer interrupt code, which seems OK, with the 4xx PIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82)  * in auto-reload mode.  The problem is PIT stops counting when it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83)  * hits zero.  If it would wrap, we could use it just like a decrementer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) static inline u64 get_dec(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	if (IS_ENABLED(CONFIG_40x))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 		return mfspr(SPRN_PIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	return mfspr(SPRN_DEC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94)  * Note: Book E and 4xx processors differ from other PowerPC processors
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95)  * in when the decrementer generates its interrupt: on the 1 to 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96)  * transition for Book E/4xx, but on the 0 to -1 transition for others.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) static inline void set_dec(u64 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	if (IS_ENABLED(CONFIG_40x))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 		mtspr(SPRN_PIT, (u32)val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	else if (IS_ENABLED(CONFIG_BOOKE))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 		mtspr(SPRN_DEC, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 		mtspr(SPRN_DEC, val - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) static inline unsigned long tb_ticks_since(unsigned long tstamp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	return mftb() - tstamp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #define mulhwu(x,y) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) ({unsigned z; asm ("mulhwu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;})
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #ifdef CONFIG_PPC64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) #define mulhdu(x,y) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) ({unsigned long z; asm ("mulhdu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;})
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) extern u64 mulhdu(u64, u64);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) extern void div128_by_32(u64 dividend_high, u64 dividend_low,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 			 unsigned divisor, struct div_result *dr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) extern void secondary_cpu_time_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) extern void __init time_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) DECLARE_PER_CPU(u64, decrementers_next_tb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) /* Convert timebase ticks to nanoseconds */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) unsigned long long tb_to_ns(unsigned long long tb_ticks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) /* SPLPAR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) void accumulate_stolen_time(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) #endif /* __KERNEL__ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) #endif /* __POWERPC_TIME_H */