Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) #ifndef _POWERPC_PROM_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) #define _POWERPC_PROM_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) #ifdef __KERNEL__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Definitions for talking to the Open Firmware PROM on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * Power Macintosh computers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  * Copyright (C) 1996-2005 Paul Mackerras.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  * Updates for PPC64 by Peter Bergner & David Engebretsen, IBM Corp.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <asm/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/atomic.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) /* These includes should be removed once implicit includes are cleaned up. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/of_fdt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/of_address.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/of_irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define OF_DT_BEGIN_NODE	0x1		/* Start of node, full name */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define OF_DT_END_NODE		0x2		/* End node */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define OF_DT_PROP		0x3		/* Property: name off, size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 						 * content */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define OF_DT_NOP		0x4		/* nop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define OF_DT_END		0x9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define OF_DT_VERSION		0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35)  * This is what gets passed to the kernel by prom_init or kexec
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37)  * The dt struct contains the device tree structure, full pathes and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38)  * property contents. The dt strings contain a separate block with just
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39)  * the strings for the property names, and is fully page aligned and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40)  * self contained in a page, so that it can be kept around by the kernel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41)  * each property name appears only once in this page (cheap compression)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43)  * the mem_rsvmap contains a map of reserved ranges of physical memory,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44)  * passing it here instead of in the device-tree itself greatly simplifies
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45)  * the job of everybody. It's just a list of u64 pairs (base/size) that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46)  * ends when size is 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) struct boot_param_header {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	__be32	magic;			/* magic word OF_DT_HEADER */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	__be32	totalsize;		/* total size of DT block */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	__be32	off_dt_struct;		/* offset to structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	__be32	off_dt_strings;		/* offset to strings */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	__be32	off_mem_rsvmap;		/* offset to memory reserve map */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	__be32	version;		/* format version */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	__be32	last_comp_version;	/* last compatible version */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	/* version 2 fields below */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	__be32	boot_cpuid_phys;	/* Physical CPU id we're booting on */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	/* version 3 fields below */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	__be32	dt_strings_size;	/* size of the DT strings block */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	/* version 17 fields below */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	__be32	dt_struct_size;		/* size of the DT structure block */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65)  * OF address retreival & translation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) /* Parse the ibm,dma-window property of an OF node into the busno, phys and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69)  * size parameters.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) void of_parse_dma_window(struct device_node *dn, const __be32 *dma_window,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 			 unsigned long *busno, unsigned long *phys,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 			 unsigned long *size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) extern void of_instantiate_rtc(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) extern int of_get_ibm_chip_id(struct device_node *np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) struct of_drc_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	char *drc_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	char *drc_name_prefix;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	u32 drc_index_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	u32 drc_name_suffix_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	u32 num_sequential_elems;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	u32 sequential_inc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	u32 drc_power_domain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	u32 last_drc_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) extern int of_read_drc_info_cell(struct property **prop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 			const __be32 **curval, struct of_drc_info *data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95)  * There are two methods for telling firmware what our capabilities are.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96)  * Newer machines have an "ibm,client-architecture-support" method on the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97)  * root node.  For older machines, we have to call the "process-elf-header"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98)  * method in the /packages/elf-loader node, passing it a fake 32-bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99)  * ELF header containing a couple of PT_NOTE sections that contain
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)  * structures that contain various information.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) /* New method - extensible architecture description vector. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) /* Option vector bits - generic bits in byte 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #define OV_IGNORE		0x80	/* ignore this vector */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #define OV_CESSATION_POLICY	0x40	/* halt if unsupported option present*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) /* Option vector 1: processor architectures supported */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) #define OV1_PPC_2_00		0x80	/* set if we support PowerPC 2.00 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #define OV1_PPC_2_01		0x40	/* set if we support PowerPC 2.01 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #define OV1_PPC_2_02		0x20	/* set if we support PowerPC 2.02 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #define OV1_PPC_2_03		0x10	/* set if we support PowerPC 2.03 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define OV1_PPC_2_04		0x08	/* set if we support PowerPC 2.04 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #define OV1_PPC_2_05		0x04	/* set if we support PowerPC 2.05 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #define OV1_PPC_2_06		0x02	/* set if we support PowerPC 2.06 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) #define OV1_PPC_2_07		0x01	/* set if we support PowerPC 2.07 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) #define OV1_PPC_3_00		0x80	/* set if we support PowerPC 3.00 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #define OV1_PPC_3_1			0x40	/* set if we support PowerPC 3.1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) /* Option vector 2: Open Firmware options supported */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) #define OV2_REAL_MODE		0x20	/* set if we want OF in real mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) /* Option vector 3: processor options supported */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #define OV3_FP			0x80	/* floating point */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) #define OV3_VMX			0x40	/* VMX/Altivec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) #define OV3_DFP			0x20	/* decimal FP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) /* Option vector 4: IBM PAPR implementation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) #define OV4_MIN_ENT_CAP		0x01	/* minimum VP entitled capacity */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) /* Option vector 5: PAPR/OF options supported
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)  * These bits are also used in firmware_has_feature() to validate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)  * the capabilities reported for vector 5 in the device tree so we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)  * encode the vector index in the define and use the OV5_FEAT()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)  * and OV5_INDX() macros to extract the desired information.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) #define OV5_FEAT(x)	((x) & 0xff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) #define OV5_INDX(x)	((x) >> 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) #define OV5_LPAR		0x0280	/* logical partitioning supported */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) #define OV5_SPLPAR		0x0240	/* shared-processor LPAR supported */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) /* ibm,dynamic-reconfiguration-memory property supported */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) #define OV5_DRCONF_MEMORY	0x0220
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) #define OV5_LARGE_PAGES		0x0210	/* large pages supported */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) #define OV5_DONATE_DEDICATE_CPU	0x0202	/* donate dedicated CPU support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) #define OV5_MSI			0x0201	/* PCIe/MSI support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) #define OV5_CMO			0x0480	/* Cooperative Memory Overcommitment */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) #define OV5_XCMO		0x0440	/* Page Coalescing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) #define OV5_TYPE1_AFFINITY	0x0580	/* Type 1 NUMA affinity */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) #define OV5_PRRN		0x0540	/* Platform Resource Reassignment */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) #define OV5_HP_EVT		0x0604	/* Hot Plug Event support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) #define OV5_RESIZE_HPT		0x0601	/* Hash Page Table resizing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) #define OV5_PFO_HW_RNG		0x1180	/* PFO Random Number Generator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) #define OV5_PFO_HW_842		0x1140	/* PFO Compression Accelerator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) #define OV5_PFO_HW_ENCR		0x1120	/* PFO Encryption Accelerator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) #define OV5_SUB_PROCESSORS	0x1501	/* 1,2,or 4 Sub-Processors supported */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) #define OV5_DRMEM_V2		0x1680	/* ibm,dynamic-reconfiguration-v2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) #define OV5_XIVE_SUPPORT	0x17C0	/* XIVE Exploitation Support Mask */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) #define OV5_XIVE_LEGACY		0x1700	/* XIVE legacy mode Only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) #define OV5_XIVE_EXPLOIT	0x1740	/* XIVE exploitation mode Only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) #define OV5_XIVE_EITHER		0x1780	/* XIVE legacy or exploitation mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) /* MMU Base Architecture */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) #define OV5_MMU_SUPPORT		0x18C0	/* MMU Mode Support Mask */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) #define OV5_MMU_HASH		0x1800	/* Hash MMU Only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) #define OV5_MMU_RADIX		0x1840	/* Radix MMU Only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) #define OV5_MMU_EITHER		0x1880	/* Hash or Radix Supported */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) #define OV5_MMU_DYNAMIC		0x18C0	/* Hash or Radix Can Switch Later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) #define OV5_NMMU		0x1820	/* Nest MMU Available */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) /* Hash Table Extensions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) #define OV5_HASH_SEG_TBL	0x1980	/* In Memory Segment Tables Available */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) #define OV5_HASH_GTSE		0x1940	/* Guest Translation Shoot Down Avail */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) /* Radix Table Extensions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) #define OV5_RADIX_GTSE		0x1A40	/* Guest Translation Shoot Down Avail */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) #define OV5_DRC_INFO		0x1640	/* Redef Prop Structures: drc-info   */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) /* Option Vector 6: IBM PAPR hints */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) #define OV6_LINUX		0x02	/* Linux is our OS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) #endif /* __KERNEL__ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) #endif /* _POWERPC_PROM_H */