Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * c 2001 PPC 64 Team, IBM Corp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) #ifndef _ASM_POWERPC_PPC_PCI_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) #define _ASM_POWERPC_PPC_PCI_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) #ifdef __KERNEL__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #ifdef CONFIG_PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <asm/pci-bridge.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) extern unsigned long isa_io_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) extern void pci_setup_phb_io(struct pci_controller *hose, int primary);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) extern void pci_setup_phb_io_dynamic(struct pci_controller *hose, int primary);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) extern struct list_head hose_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) extern struct pci_dev *isa_bridge_pcidev;	/* may be NULL if no ISA bus */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) /** Bus Unit ID macros; get low and hi 32-bits of the 64-bit BUID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define BUID_HI(buid) upper_32_bits(buid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define BUID_LO(buid) lower_32_bits(buid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) /* PCI device_node operations */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) struct device_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) struct pci_dn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) void *pci_traverse_device_nodes(struct device_node *start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 				void *(*fn)(struct device_node *, void *),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 				void *data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) void *traverse_pci_dn(struct pci_dn *root,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 		      void *(*fn)(struct pci_dn *, void *),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 		      void *data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) extern void pci_devs_phb_init_dynamic(struct pci_controller *phb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) /* From rtas_pci.h */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) extern void init_pci_config_tokens (void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) extern unsigned long get_phb_buid (struct device_node *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) extern int rtas_setup_phb(struct pci_controller *phb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #ifdef CONFIG_EEH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) void eeh_addr_cache_insert_dev(struct pci_dev *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) void eeh_addr_cache_rmv_dev(struct pci_dev *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) struct eeh_dev *eeh_addr_cache_get_dev(unsigned long addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) void eeh_slot_error_detail(struct eeh_pe *pe, int severity);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) int eeh_pci_enable(struct eeh_pe *pe, int function);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) int eeh_pe_reset_full(struct eeh_pe *pe, bool include_passed);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) void eeh_save_bars(struct eeh_dev *edev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) int rtas_write_config(struct pci_dn *, int where, int size, u32 val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) int rtas_read_config(struct pci_dn *, int where, int size, u32 *val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) void eeh_pe_state_mark(struct eeh_pe *pe, int state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) void eeh_pe_mark_isolated(struct eeh_pe *pe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) void eeh_pe_state_clear(struct eeh_pe *pe, int state, bool include_passed);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) void eeh_pe_state_mark_with_cfg(struct eeh_pe *pe, int state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) void eeh_pe_dev_mode_mark(struct eeh_pe *pe, int mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) void eeh_sysfs_add_device(struct pci_dev *pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) void eeh_sysfs_remove_device(struct pci_dev *pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) static inline const char *eeh_driver_name(struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 	return (pdev && pdev->driver) ? pdev->driver->name : "<null>";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #endif /* CONFIG_EEH */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define PCI_BUSNO(bdfn) ((bdfn >> 8) & 0xff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #else /* CONFIG_PCI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) static inline void init_pci_config_tokens(void) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #endif /* !CONFIG_PCI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #endif /* __KERNEL__ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #endif /* _ASM_POWERPC_PPC_PCI_H */