Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Copyright 2014 IBM Corp.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) #ifndef _ASM_PNV_PCI_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) #define _ASM_PNV_PCI_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/pci_hotplug.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <misc/cxl-base.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <asm/opal-api.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define PCI_SLOT_ID_PREFIX	(1UL << 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define PCI_SLOT_ID(phb_id, bdfn)	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 	(PCI_SLOT_ID_PREFIX | ((uint64_t)(bdfn) << 16) | (phb_id))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define PCI_PHB_SLOT_ID(phb_id)		(phb_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) extern int pnv_pci_get_slot_id(struct device_node *np, uint64_t *id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) extern int pnv_pci_get_device_tree(uint32_t phandle, void *buf, uint64_t len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) extern int pnv_pci_get_presence_state(uint64_t id, uint8_t *state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) extern int pnv_pci_get_power_state(uint64_t id, uint8_t *state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) extern int pnv_pci_set_power_state(uint64_t id, uint8_t state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 				   struct opal_msg *msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) extern int pnv_pci_set_tunnel_bar(struct pci_dev *dev, uint64_t addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 				  int enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) int pnv_phb_to_cxl_mode(struct pci_dev *dev, uint64_t mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) int pnv_cxl_ioda_msi_setup(struct pci_dev *dev, unsigned int hwirq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 			   unsigned int virq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) int pnv_cxl_alloc_hwirqs(struct pci_dev *dev, int num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) void pnv_cxl_release_hwirqs(struct pci_dev *dev, int hwirq, int num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) int pnv_cxl_get_irq_count(struct pci_dev *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) struct device_node *pnv_pci_get_phb_node(struct pci_dev *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) int64_t pnv_opal_pci_msi_eoi(struct irq_chip *chip, unsigned int hw_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) bool is_pnv_opal_msi(struct irq_chip *chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #ifdef CONFIG_CXL_BASE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) int pnv_cxl_alloc_hwirq_ranges(struct cxl_irq_ranges *irqs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 			       struct pci_dev *dev, int num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) void pnv_cxl_release_hwirq_ranges(struct cxl_irq_ranges *irqs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 				  struct pci_dev *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) struct pnv_php_slot {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 	struct hotplug_slot		slot;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 	uint64_t			id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 	char				*name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 	int				slot_no;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 	unsigned int			flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define PNV_PHP_FLAG_BROKEN_PDC		0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 	struct kref			kref;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define PNV_PHP_STATE_INITIALIZED	0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define PNV_PHP_STATE_REGISTERED	1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define PNV_PHP_STATE_POPULATED		2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define PNV_PHP_STATE_OFFLINE		3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 	int				state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 	int				irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 	struct workqueue_struct		*wq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 	struct device_node		*dn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 	struct pci_dev			*pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 	struct pci_bus			*bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 	bool				power_state_check;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 	u8				attention_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) 	void				*fdt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 	void				*dt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) 	struct of_changeset		ocs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 	struct pnv_php_slot		*parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) 	struct list_head		children;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 	struct list_head		link;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) extern struct pnv_php_slot *pnv_php_find_slot(struct device_node *dn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) extern int pnv_php_set_slot_power_state(struct hotplug_slot *slot,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) 					uint8_t state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #endif