^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * MPC85xx cpu type detection
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright 2011-2012 Freescale Semiconductor, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #ifndef __ASM_PPC_MPC85XX_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #define __ASM_PPC_MPC85XX_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define SVR_REV(svr) ((svr) & 0xFF) /* SOC design resision */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define SVR_MAJ(svr) (((svr) >> 4) & 0xF) /* Major revision field*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define SVR_MIN(svr) (((svr) >> 0) & 0xF) /* Minor revision field*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) /* Some parts define SVR[0:23] as the SOC version */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define SVR_SOC_VER(svr) (((svr) >> 8) & 0xFFF7FF) /* SOC Version fields */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define SVR_8533 0x803400
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define SVR_8535 0x803701
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define SVR_8536 0x803700
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define SVR_8540 0x803000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define SVR_8541 0x807200
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define SVR_8543 0x803200
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define SVR_8544 0x803401
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define SVR_8545 0x803102
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define SVR_8547 0x803101
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define SVR_8548 0x803100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define SVR_8555 0x807100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define SVR_8560 0x807000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define SVR_8567 0x807501
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define SVR_8568 0x807500
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define SVR_8569 0x808000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define SVR_8572 0x80E000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define SVR_P1010 0x80F100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define SVR_P1011 0x80E500
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define SVR_P1012 0x80E501
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define SVR_P1013 0x80E700
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define SVR_P1014 0x80F101
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define SVR_P1017 0x80F700
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define SVR_P1020 0x80E400
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define SVR_P1021 0x80E401
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define SVR_P1022 0x80E600
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define SVR_P1023 0x80F600
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define SVR_P1024 0x80E402
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define SVR_P1025 0x80E403
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define SVR_P2010 0x80E300
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define SVR_P2020 0x80E200
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define SVR_P2040 0x821000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define SVR_P2041 0x821001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define SVR_P3041 0x821103
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define SVR_P4040 0x820100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define SVR_P4080 0x820000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define SVR_P5010 0x822100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define SVR_P5020 0x822000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define SVR_P5021 0X820500
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define SVR_P5040 0x820400
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define SVR_T4240 0x824000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define SVR_T4120 0x824001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define SVR_T4160 0x824100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define SVR_T4080 0x824102
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define SVR_C291 0x850000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define SVR_C292 0x850020
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define SVR_C293 0x850030
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define SVR_B4860 0X868000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define SVR_G4860 0x868001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define SVR_G4060 0x868003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define SVR_B4440 0x868100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define SVR_G4440 0x868101
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define SVR_B4420 0x868102
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define SVR_B4220 0x868103
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define SVR_T1040 0x852000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define SVR_T1041 0x852001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define SVR_T1042 0x852002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define SVR_T1020 0x852100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define SVR_T1021 0x852101
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define SVR_T1022 0x852102
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define SVR_T2080 0x853000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define SVR_T2081 0x853100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define SVR_8610 0x80A000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define SVR_8641 0x809000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define SVR_8641D 0x809001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define SVR_9130 0x860001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define SVR_9131 0x860000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define SVR_9132 0x861000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define SVR_9232 0x861400
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define SVR_Unknown 0xFFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #endif
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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