^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Architecture specific parts of the Floppy driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * This file is subject to the terms and conditions of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * License. See the file "COPYING" in the main directory of this archive
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Copyright (C) 1995
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #ifndef __ASM_POWERPC_FLOPPY_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define __ASM_POWERPC_FLOPPY_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #ifdef __KERNEL__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <asm/machdep.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define fd_inb(base, reg) inb_p((base) + (reg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define fd_outb(value, base, reg) outb_p(value, (base) + (reg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define fd_enable_dma() enable_dma(FLOPPY_DMA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define fd_disable_dma() fd_ops->_disable_dma(FLOPPY_DMA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define fd_free_dma() fd_ops->_free_dma(FLOPPY_DMA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define fd_clear_dma_ff() clear_dma_ff(FLOPPY_DMA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define fd_set_dma_mode(mode) set_dma_mode(FLOPPY_DMA, mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define fd_set_dma_count(count) set_dma_count(FLOPPY_DMA, count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define fd_get_dma_residue() fd_ops->_get_dma_residue(FLOPPY_DMA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define fd_enable_irq() enable_irq(FLOPPY_IRQ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define fd_disable_irq() disable_irq(FLOPPY_IRQ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define fd_free_irq() free_irq(FLOPPY_IRQ, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <asm/ppc-pci.h> /* for isa_bridge_pcidev */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define fd_dma_setup(addr,size,mode,io) fd_ops->_dma_setup(addr,size,mode,io)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) static int fd_request_dma(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) struct fd_dma_ops {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) void (*_disable_dma)(unsigned int dmanr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) void (*_free_dma)(unsigned int dmanr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) int (*_get_dma_residue)(unsigned int dummy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) int (*_dma_setup)(char *addr, unsigned long size, int mode, int io);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) static int virtual_dma_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) static int virtual_dma_residue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) static char *virtual_dma_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) static int virtual_dma_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) static int doing_vdma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) static struct fd_dma_ops *fd_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) static irqreturn_t floppy_hardint(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) unsigned char st;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) int lcount;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) char *lptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) if (!doing_vdma)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) return floppy_interrupt(irq, dev_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) st = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) for (lcount=virtual_dma_count, lptr=virtual_dma_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) lcount; lcount--, lptr++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) st = inb(virtual_dma_port + FD_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) st &= STATUS_DMA | STATUS_READY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) if (st != (STATUS_DMA | STATUS_READY))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) if (virtual_dma_mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) outb_p(*lptr, virtual_dma_port + FD_DATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) *lptr = inb_p(virtual_dma_port + FD_DATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) virtual_dma_count = lcount;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) virtual_dma_addr = lptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) st = inb(virtual_dma_port + FD_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) if (st == STATUS_DMA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) if (!(st & STATUS_DMA)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) virtual_dma_residue += virtual_dma_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) virtual_dma_count=0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) doing_vdma = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) floppy_interrupt(irq, dev_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) static void vdma_disable_dma(unsigned int dummy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) doing_vdma = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) virtual_dma_residue += virtual_dma_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) virtual_dma_count=0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) static void vdma_nop(unsigned int dummy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) static int vdma_get_dma_residue(unsigned int dummy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) return virtual_dma_count + virtual_dma_residue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) static int fd_request_irq(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) if (can_use_virtual_dma)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) return request_irq(FLOPPY_IRQ, floppy_hardint,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 0, "floppy", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) return request_irq(FLOPPY_IRQ, floppy_interrupt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 0, "floppy", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) static int vdma_dma_setup(char *addr, unsigned long size, int mode, int io)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) doing_vdma = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) virtual_dma_port = io;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) virtual_dma_mode = (mode == DMA_MODE_WRITE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) virtual_dma_addr = addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) virtual_dma_count = size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) virtual_dma_residue = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) static int hard_dma_setup(char *addr, unsigned long size, int mode, int io)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) static unsigned long prev_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) static dma_addr_t bus_addr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) static char *prev_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) static int prev_dir;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) int dir;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) doing_vdma = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) dir = (mode == DMA_MODE_READ) ? PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) if (bus_addr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) && (addr != prev_addr || size != prev_size || dir != prev_dir)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) /* different from last time -- unmap prev */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) pci_unmap_single(isa_bridge_pcidev, bus_addr, prev_size, prev_dir);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) bus_addr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) if (!bus_addr) /* need to map it */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) bus_addr = pci_map_single(isa_bridge_pcidev, addr, size, dir);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) /* remember this one as prev */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) prev_addr = addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) prev_size = size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) prev_dir = dir;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) fd_clear_dma_ff();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) fd_set_dma_mode(mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) set_dma_addr(FLOPPY_DMA, bus_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) fd_set_dma_count(size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) virtual_dma_port = io;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) fd_enable_dma();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) static struct fd_dma_ops real_dma_ops =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) ._disable_dma = disable_dma,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) ._free_dma = free_dma,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) ._get_dma_residue = get_dma_residue,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) ._dma_setup = hard_dma_setup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) static struct fd_dma_ops virt_dma_ops =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) ._disable_dma = vdma_disable_dma,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) ._free_dma = vdma_nop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) ._get_dma_residue = vdma_get_dma_residue,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) ._dma_setup = vdma_dma_setup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) static int fd_request_dma(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) if (can_use_virtual_dma & 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) fd_ops = &virt_dma_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) fd_ops = &real_dma_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) return request_dma(FLOPPY_DMA, "floppy");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) static int FDC1 = 0x3f0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) static int FDC2 = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) * Again, the CMOS information not available
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) #define FLOPPY0_TYPE 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) #define FLOPPY1_TYPE 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) #define N_FDC 2 /* Don't change this! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) #define N_DRIVE 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) * The PowerPC has no problems with floppy DMA crossing 64k borders.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) #define CROSS_64KB(a,s) (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) #define EXTRA_FLOPPY_PARAMS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) #endif /* __KERNEL__ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) #endif /* __ASM_POWERPC_FLOPPY_H */