^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) #ifndef __ASM_POWERPC_FEATURE_FIXUPS_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #define __ASM_POWERPC_FEATURE_FIXUPS_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) #include <asm/asm-const.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * Feature section common macros
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * Note that the entries now contain offsets between the table entry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * and the code rather than absolute code pointers in order to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * useable with the vdso shared library. There is also an assumption
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * that values will be negative, that is, the fixup table has to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * located after the code it fixes up.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #if defined(CONFIG_PPC64) && !defined(__powerpc64__)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) /* 64 bits kernel, 32 bits code (ie. vdso32) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define FTR_ENTRY_LONG .8byte
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define FTR_ENTRY_OFFSET .long 0xffffffff; .long
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #elif defined(CONFIG_PPC64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define FTR_ENTRY_LONG .8byte
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define FTR_ENTRY_OFFSET .8byte
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define FTR_ENTRY_LONG .long
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define FTR_ENTRY_OFFSET .long
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define START_FTR_SECTION(label) label##1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define FTR_SECTION_ELSE_NESTED(label) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) label##2: \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) .pushsection __ftr_alt_##label,"a"; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) .align 2; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) label##3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define MAKE_FTR_SECTION_ENTRY(msk, val, label, sect) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) label##4: \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) .popsection; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) .pushsection sect,"a"; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) .align 3; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) label##5: \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) FTR_ENTRY_LONG msk; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) FTR_ENTRY_LONG val; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) FTR_ENTRY_OFFSET label##1b-label##5b; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) FTR_ENTRY_OFFSET label##2b-label##5b; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) FTR_ENTRY_OFFSET label##3b-label##5b; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) FTR_ENTRY_OFFSET label##4b-label##5b; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) .ifgt (label##4b- label##3b)-(label##2b- label##1b); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) .error "Feature section else case larger than body"; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) .endif; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) .popsection;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) /* CPU feature dependent sections */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define BEGIN_FTR_SECTION_NESTED(label) START_FTR_SECTION(label)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define BEGIN_FTR_SECTION START_FTR_SECTION(97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define END_FTR_SECTION_NESTED(msk, val, label) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) FTR_SECTION_ELSE_NESTED(label) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) MAKE_FTR_SECTION_ENTRY(msk, val, label, __ftr_fixup)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define END_FTR_SECTION(msk, val) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) END_FTR_SECTION_NESTED(msk, val, 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define END_FTR_SECTION_NESTED_IFSET(msk, label) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) END_FTR_SECTION_NESTED((msk), (msk), label)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define END_FTR_SECTION_IFSET(msk) END_FTR_SECTION((msk), (msk))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define END_FTR_SECTION_IFCLR(msk) END_FTR_SECTION((msk), 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) /* CPU feature sections with alternatives, use BEGIN_FTR_SECTION to start */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define FTR_SECTION_ELSE FTR_SECTION_ELSE_NESTED(97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define ALT_FTR_SECTION_END_NESTED(msk, val, label) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) MAKE_FTR_SECTION_ENTRY(msk, val, label, __ftr_fixup)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define ALT_FTR_SECTION_END_NESTED_IFSET(msk, label) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) ALT_FTR_SECTION_END_NESTED(msk, msk, label)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define ALT_FTR_SECTION_END_NESTED_IFCLR(msk, label) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) ALT_FTR_SECTION_END_NESTED(msk, 0, label)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define ALT_FTR_SECTION_END(msk, val) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) ALT_FTR_SECTION_END_NESTED(msk, val, 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define ALT_FTR_SECTION_END_IFSET(msk) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) ALT_FTR_SECTION_END_NESTED_IFSET(msk, 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define ALT_FTR_SECTION_END_IFCLR(msk) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) ALT_FTR_SECTION_END_NESTED_IFCLR(msk, 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) /* MMU feature dependent sections */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define BEGIN_MMU_FTR_SECTION_NESTED(label) START_FTR_SECTION(label)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define BEGIN_MMU_FTR_SECTION START_FTR_SECTION(97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define END_MMU_FTR_SECTION_NESTED(msk, val, label) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) FTR_SECTION_ELSE_NESTED(label) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) MAKE_FTR_SECTION_ENTRY(msk, val, label, __mmu_ftr_fixup)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define END_MMU_FTR_SECTION(msk, val) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) END_MMU_FTR_SECTION_NESTED(msk, val, 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define END_MMU_FTR_SECTION_NESTED_IFSET(msk, label) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) END_MMU_FTR_SECTION_NESTED((msk), (msk), label)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define END_MMU_FTR_SECTION_IFSET(msk) END_MMU_FTR_SECTION((msk), (msk))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #define END_MMU_FTR_SECTION_IFCLR(msk) END_MMU_FTR_SECTION((msk), 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) /* MMU feature sections with alternatives, use BEGIN_FTR_SECTION to start */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #define MMU_FTR_SECTION_ELSE_NESTED(label) FTR_SECTION_ELSE_NESTED(label)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #define MMU_FTR_SECTION_ELSE MMU_FTR_SECTION_ELSE_NESTED(97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #define ALT_MMU_FTR_SECTION_END_NESTED(msk, val, label) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) MAKE_FTR_SECTION_ENTRY(msk, val, label, __mmu_ftr_fixup)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #define ALT_MMU_FTR_SECTION_END_NESTED_IFSET(msk, label) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) ALT_MMU_FTR_SECTION_END_NESTED(msk, msk, label)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #define ALT_MMU_FTR_SECTION_END_NESTED_IFCLR(msk, label) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) ALT_MMU_FTR_SECTION_END_NESTED(msk, 0, label)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #define ALT_MMU_FTR_SECTION_END(msk, val) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) ALT_MMU_FTR_SECTION_END_NESTED(msk, val, 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) #define ALT_MMU_FTR_SECTION_END_IFSET(msk) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) ALT_MMU_FTR_SECTION_END_NESTED_IFSET(msk, 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) #define ALT_MMU_FTR_SECTION_END_IFCLR(msk) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) ALT_MMU_FTR_SECTION_END_NESTED_IFCLR(msk, 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) /* Firmware feature dependent sections */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) #define BEGIN_FW_FTR_SECTION_NESTED(label) START_FTR_SECTION(label)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) #define BEGIN_FW_FTR_SECTION START_FTR_SECTION(97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #define END_FW_FTR_SECTION_NESTED(msk, val, label) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) FTR_SECTION_ELSE_NESTED(label) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) MAKE_FTR_SECTION_ENTRY(msk, val, label, __fw_ftr_fixup)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) #define END_FW_FTR_SECTION(msk, val) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) END_FW_FTR_SECTION_NESTED(msk, val, 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) #define END_FW_FTR_SECTION_IFSET(msk) END_FW_FTR_SECTION((msk), (msk))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) #define END_FW_FTR_SECTION_IFCLR(msk) END_FW_FTR_SECTION((msk), 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) /* Firmware feature sections with alternatives */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) #define FW_FTR_SECTION_ELSE_NESTED(label) FTR_SECTION_ELSE_NESTED(label)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) #define FW_FTR_SECTION_ELSE FTR_SECTION_ELSE_NESTED(97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) #define ALT_FW_FTR_SECTION_END_NESTED(msk, val, label) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) MAKE_FTR_SECTION_ENTRY(msk, val, label, __fw_ftr_fixup)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) #define ALT_FW_FTR_SECTION_END_NESTED_IFSET(msk, label) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) ALT_FW_FTR_SECTION_END_NESTED(msk, msk, label)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) #define ALT_FW_FTR_SECTION_END_NESTED_IFCLR(msk, label) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) ALT_FW_FTR_SECTION_END_NESTED(msk, 0, label)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) #define ALT_FW_FTR_SECTION_END(msk, val) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) ALT_FW_FTR_SECTION_END_NESTED(msk, val, 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) #define ALT_FW_FTR_SECTION_END_IFSET(msk) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) ALT_FW_FTR_SECTION_END_NESTED_IFSET(msk, 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) #define ALT_FW_FTR_SECTION_END_IFCLR(msk) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) ALT_FW_FTR_SECTION_END_NESTED_IFCLR(msk, 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) #ifndef __ASSEMBLY__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) #define ASM_FTR_IF(section_if, section_else, msk, val) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) stringify_in_c(BEGIN_FTR_SECTION) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) section_if "; " \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) stringify_in_c(FTR_SECTION_ELSE) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) section_else "; " \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) stringify_in_c(ALT_FTR_SECTION_END((msk), (val)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) #define ASM_FTR_IFSET(section_if, section_else, msk) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) ASM_FTR_IF(section_if, section_else, (msk), (msk))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) #define ASM_FTR_IFCLR(section_if, section_else, msk) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) ASM_FTR_IF(section_if, section_else, (msk), 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) #define ASM_MMU_FTR_IF(section_if, section_else, msk, val) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) stringify_in_c(BEGIN_MMU_FTR_SECTION) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) section_if "; " \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) stringify_in_c(MMU_FTR_SECTION_ELSE) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) section_else "; " \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) stringify_in_c(ALT_MMU_FTR_SECTION_END((msk), (val)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) #define ASM_MMU_FTR_IFSET(section_if, section_else, msk) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) ASM_MMU_FTR_IF(section_if, section_else, (msk), (msk))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) #define ASM_MMU_FTR_IFCLR(section_if, section_else, msk) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) ASM_MMU_FTR_IF(section_if, section_else, (msk), 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) #endif /* __ASSEMBLY__ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) /* LWSYNC feature sections */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) #define START_LWSYNC_SECTION(label) label##1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) #define MAKE_LWSYNC_SECTION_ENTRY(label, sect) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) label##2: \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) .pushsection sect,"a"; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) .align 2; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) label##3: \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) FTR_ENTRY_OFFSET label##1b-label##3b; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) .popsection;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) #define STF_ENTRY_BARRIER_FIXUP_SECTION \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 953: \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) .pushsection __stf_entry_barrier_fixup,"a"; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) .align 2; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 954: \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) FTR_ENTRY_OFFSET 953b-954b; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) .popsection;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) #define STF_EXIT_BARRIER_FIXUP_SECTION \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 955: \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) .pushsection __stf_exit_barrier_fixup,"a"; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) .align 2; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 956: \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) FTR_ENTRY_OFFSET 955b-956b; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) .popsection;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) #define UACCESS_FLUSH_FIXUP_SECTION \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 959: \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) .pushsection __uaccess_flush_fixup,"a"; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) .align 2; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 960: \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) FTR_ENTRY_OFFSET 959b-960b; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) .popsection;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) #define ENTRY_FLUSH_FIXUP_SECTION \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 957: \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) .pushsection __entry_flush_fixup,"a"; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) .align 2; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 958: \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) FTR_ENTRY_OFFSET 957b-958b; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) .popsection;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) #define SCV_ENTRY_FLUSH_FIXUP_SECTION \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 957: \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) .pushsection __scv_entry_flush_fixup,"a"; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) .align 2; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 958: \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) FTR_ENTRY_OFFSET 957b-958b; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) .popsection;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) #define RFI_FLUSH_FIXUP_SECTION \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 951: \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) .pushsection __rfi_flush_fixup,"a"; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) .align 2; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 952: \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) FTR_ENTRY_OFFSET 951b-952b; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) .popsection;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) #define NOSPEC_BARRIER_FIXUP_SECTION \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 953: \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) .pushsection __barrier_nospec_fixup,"a"; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) .align 2; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 954: \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) FTR_ENTRY_OFFSET 953b-954b; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) .popsection;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) #define START_BTB_FLUSH_SECTION \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 955: \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) #define END_BTB_FLUSH_SECTION \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 956: \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) .pushsection __btb_flush_fixup,"a"; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) .align 2; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 957: \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) FTR_ENTRY_OFFSET 955b-957b; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) FTR_ENTRY_OFFSET 956b-957b; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) .popsection;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) #ifndef __ASSEMBLY__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) extern long stf_barrier_fallback;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) extern long entry_flush_fallback;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) extern long scv_entry_flush_fallback;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) extern long __start___stf_entry_barrier_fixup, __stop___stf_entry_barrier_fixup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) extern long __start___stf_exit_barrier_fixup, __stop___stf_exit_barrier_fixup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) extern long __start___uaccess_flush_fixup, __stop___uaccess_flush_fixup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) extern long __start___entry_flush_fixup, __stop___entry_flush_fixup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) extern long __start___scv_entry_flush_fixup, __stop___scv_entry_flush_fixup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) extern long __start___rfi_flush_fixup, __stop___rfi_flush_fixup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) extern long __start___barrier_nospec_fixup, __stop___barrier_nospec_fixup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) extern long __start__btb_flush_fixup, __stop__btb_flush_fixup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) void apply_feature_fixups(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) void setup_feature_keys(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) #endif /* __ASM_POWERPC_FEATURE_FIXUPS_H */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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