^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) #ifndef _ASM_POWERPC_EXCEPTION_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #define _ASM_POWERPC_EXCEPTION_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Extracted from head_64.S
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * PowerPC version
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * Adapted for Power Macintosh by Paul Mackerras.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * Low-level exception handlers and MMU support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * rewritten by Paul Mackerras.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * Copyright (C) 1996 Paul Mackerras.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * This file contains the low-level support and setup for the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * PowerPC-64 platform, including trap and interrupt dispatch.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * The following macros define the code that appears as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * the prologue to each of the exception handlers. They
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * are split into two parts to allow a single kernel binary
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * to be used for pSeries and iSeries.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * We make as much of the exception code common between native
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * exception handlers (including pSeries LPAR) and iSeries LPAR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * implementations as possible.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <asm/feature-fixups.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) /* PACA save area size in u64 units (exgen, exmc, etc) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define EX_SIZE 10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * maximum recursive depth of MCE exceptions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define MAX_MCE_DEPTH 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #ifdef __ASSEMBLY__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define STF_ENTRY_BARRIER_SLOT \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) STF_ENTRY_BARRIER_FIXUP_SECTION; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) nop; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) nop; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define STF_EXIT_BARRIER_SLOT \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) STF_EXIT_BARRIER_FIXUP_SECTION; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) nop; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) nop; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) nop; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) nop; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) nop; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define ENTRY_FLUSH_SLOT \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) ENTRY_FLUSH_FIXUP_SECTION; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) nop; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) nop; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) nop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define SCV_ENTRY_FLUSH_SLOT \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) SCV_ENTRY_FLUSH_FIXUP_SECTION; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) nop; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) nop; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) nop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) * r10 must be free to use, r13 must be paca
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define INTERRUPT_TO_KERNEL \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) STF_ENTRY_BARRIER_SLOT; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) ENTRY_FLUSH_SLOT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) * r10, ctr must be free to use, r13 must be paca
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define SCV_INTERRUPT_TO_KERNEL \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) STF_ENTRY_BARRIER_SLOT; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) SCV_ENTRY_FLUSH_SLOT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) * Macros for annotating the expected destination of (h)rfid
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) * The nop instructions allow us to insert one or more instructions to flush the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) * L1-D cache when returning to userspace or a guest.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) * powerpc relies on return from interrupt/syscall being context synchronising
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) * (which hrfid, rfid, and rfscv are) to support ARCH_HAS_MEMBARRIER_SYNC_CORE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) * without additional synchronisation instructions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) * soft-masked interrupt replay does not include a context-synchronising rfid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) * but those always return to kernel, the sync is only required when returning
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) * to user.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define RFI_FLUSH_SLOT \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) RFI_FLUSH_FIXUP_SECTION; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) nop; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) nop; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #define RFI_TO_KERNEL \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) rfid
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #define RFI_TO_USER \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) STF_EXIT_BARRIER_SLOT; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) RFI_FLUSH_SLOT; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) rfid; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) b rfi_flush_fallback
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #define RFI_TO_USER_OR_KERNEL \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) STF_EXIT_BARRIER_SLOT; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) RFI_FLUSH_SLOT; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) rfid; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) b rfi_flush_fallback
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) #define RFI_TO_GUEST \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) STF_EXIT_BARRIER_SLOT; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) RFI_FLUSH_SLOT; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) rfid; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) b rfi_flush_fallback
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) #define HRFI_TO_KERNEL \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) hrfid
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) #define HRFI_TO_USER \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) STF_EXIT_BARRIER_SLOT; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) RFI_FLUSH_SLOT; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) hrfid; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) b hrfi_flush_fallback
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) #define HRFI_TO_USER_OR_KERNEL \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) STF_EXIT_BARRIER_SLOT; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) RFI_FLUSH_SLOT; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) hrfid; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) b hrfi_flush_fallback
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) #define HRFI_TO_GUEST \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) STF_EXIT_BARRIER_SLOT; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) RFI_FLUSH_SLOT; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) hrfid; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) b hrfi_flush_fallback
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) #define HRFI_TO_UNKNOWN \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) STF_EXIT_BARRIER_SLOT; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) RFI_FLUSH_SLOT; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) hrfid; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) b hrfi_flush_fallback
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) #define RFSCV_TO_USER \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) STF_EXIT_BARRIER_SLOT; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) RFI_FLUSH_SLOT; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) RFSCV; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) b rfscv_flush_fallback
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) #else /* __ASSEMBLY__ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) /* Prototype for function defined in exceptions-64s.S */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) void do_uaccess_flush(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) #endif /* __ASSEMBLY__ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) #endif /* _ASM_POWERPC_EXCEPTION_H */