^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) #ifndef ASM_POWERPC_DMA_DIRECT_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #define ASM_POWERPC_DMA_DIRECT_H 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) return paddr + dev->archdata.dma_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) return daddr - dev->archdata.dma_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #endif /* ASM_POWERPC_DMA_DIRECT_H */