^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Fast SHA-1 implementation for SPE instruction set (PPC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * This code makes use of the SPE SIMD instruction set as defined in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * http://cache.freescale.com/files/32bit/doc/ref_manual/SPEPIM.pdf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Implementation is based on optimization guide notes from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * http://cache.freescale.com/files/32bit/doc/app_note/AN2665.pdf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Copyright (c) 2015 Markus Stockhausen <stockhausen@collogia.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <asm/ppc_asm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <asm/asm-offsets.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define rHP r3 /* pointer to hash value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define rWP r4 /* pointer to input */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define rKP r5 /* pointer to constants */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define rW0 r14 /* 64 bit round words */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define rW1 r15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define rW2 r16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define rW3 r17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define rW4 r18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define rW5 r19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define rW6 r20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define rW7 r21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define rH0 r6 /* 32 bit hash values */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define rH1 r7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define rH2 r8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define rH3 r9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define rH4 r10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define rT0 r22 /* 64 bit temporary */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define rT1 r0 /* 32 bit temporaries */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define rT2 r11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define rT3 r12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define rK r23 /* 64 bit constant in volatile register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define LOAD_K01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define LOAD_K11 \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) evlwwsplat rK,0(rKP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define LOAD_K21 \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) evlwwsplat rK,4(rKP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define LOAD_K31 \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) evlwwsplat rK,8(rKP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define LOAD_K41 \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) evlwwsplat rK,12(rKP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define INITIALIZE \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) stwu r1,-128(r1); /* create stack frame */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) evstdw r14,8(r1); /* We must save non volatile */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) evstdw r15,16(r1); /* registers. Take the chance */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) evstdw r16,24(r1); /* and save the SPE part too */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) evstdw r17,32(r1); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) evstdw r18,40(r1); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) evstdw r19,48(r1); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) evstdw r20,56(r1); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) evstdw r21,64(r1); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) evstdw r22,72(r1); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) evstdw r23,80(r1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define FINALIZE \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) evldw r14,8(r1); /* restore SPE registers */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) evldw r15,16(r1); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) evldw r16,24(r1); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) evldw r17,32(r1); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) evldw r18,40(r1); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) evldw r19,48(r1); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) evldw r20,56(r1); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) evldw r21,64(r1); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) evldw r22,72(r1); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) evldw r23,80(r1); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) xor r0,r0,r0; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) stw r0,8(r1); /* Delete sensitive data */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) stw r0,16(r1); /* that we might have pushed */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) stw r0,24(r1); /* from other context that runs */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) stw r0,32(r1); /* the same code. Assume that */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) stw r0,40(r1); /* the lower part of the GPRs */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) stw r0,48(r1); /* were already overwritten on */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) stw r0,56(r1); /* the way down to here */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) stw r0,64(r1); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) stw r0,72(r1); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) stw r0,80(r1); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) addi r1,r1,128; /* cleanup stack frame */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #ifdef __BIG_ENDIAN__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define LOAD_DATA(reg, off) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) lwz reg,off(rWP); /* load data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define NEXT_BLOCK \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) addi rWP,rWP,64; /* increment per block */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define LOAD_DATA(reg, off) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) lwbrx reg,0,rWP; /* load data */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) addi rWP,rWP,4; /* increment per word */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define NEXT_BLOCK /* nothing to do */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #define R_00_15(a, b, c, d, e, w0, w1, k, off) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) LOAD_DATA(w0, off) /* 1: W */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) and rT2,b,c; /* 1: F' = B and C */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) LOAD_K##k##1 \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) andc rT1,d,b; /* 1: F" = ~B and D */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) rotrwi rT0,a,27; /* 1: A' = A rotl 5 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) or rT2,rT2,rT1; /* 1: F = F' or F" */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) add e,e,rT0; /* 1: E = E + A' */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) rotrwi b,b,2; /* 1: B = B rotl 30 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) add e,e,w0; /* 1: E = E + W */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) LOAD_DATA(w1, off+4) /* 2: W */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) add e,e,rT2; /* 1: E = E + F */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) and rT1,a,b; /* 2: F' = B and C */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) add e,e,rK; /* 1: E = E + K */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) andc rT2,c,a; /* 2: F" = ~B and D */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) add d,d,rK; /* 2: E = E + K */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) or rT2,rT2,rT1; /* 2: F = F' or F" */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) rotrwi rT0,e,27; /* 2: A' = A rotl 5 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) add d,d,w1; /* 2: E = E + W */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) rotrwi a,a,2; /* 2: B = B rotl 30 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) add d,d,rT0; /* 2: E = E + A' */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) evmergelo w1,w1,w0; /* mix W[0]/W[1] */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) add d,d,rT2 /* 2: E = E + F */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) #define R_16_19(a, b, c, d, e, w0, w1, w4, w6, w7, k) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) and rT2,b,c; /* 1: F' = B and C */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) evmergelohi rT0,w7,w6; /* W[-3] */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) andc rT1,d,b; /* 1: F" = ~B and D */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) evxor w0,w0,rT0; /* W = W[-16] xor W[-3] */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) or rT1,rT1,rT2; /* 1: F = F' or F" */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) evxor w0,w0,w4; /* W = W xor W[-8] */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) add e,e,rT1; /* 1: E = E + F */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) evxor w0,w0,w1; /* W = W xor W[-14] */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) rotrwi rT2,a,27; /* 1: A' = A rotl 5 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) evrlwi w0,w0,1; /* W = W rotl 1 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) add e,e,rT2; /* 1: E = E + A' */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) evaddw rT0,w0,rK; /* WK = W + K */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) rotrwi b,b,2; /* 1: B = B rotl 30 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) LOAD_K##k##1 \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) evmergehi rT1,rT1,rT0; /* WK1/WK2 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) add e,e,rT0; /* 1: E = E + WK */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) add d,d,rT1; /* 2: E = E + WK */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) and rT2,a,b; /* 2: F' = B and C */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) andc rT1,c,a; /* 2: F" = ~B and D */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) rotrwi rT0,e,27; /* 2: A' = A rotl 5 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) or rT1,rT1,rT2; /* 2: F = F' or F" */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) add d,d,rT0; /* 2: E = E + A' */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) rotrwi a,a,2; /* 2: B = B rotl 30 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) add d,d,rT1 /* 2: E = E + F */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) #define R_20_39(a, b, c, d, e, w0, w1, w4, w6, w7, k) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) evmergelohi rT0,w7,w6; /* W[-3] */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) xor rT2,b,c; /* 1: F' = B xor C */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) evxor w0,w0,rT0; /* W = W[-16] xor W[-3] */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) xor rT2,rT2,d; /* 1: F = F' xor D */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) evxor w0,w0,w4; /* W = W xor W[-8] */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) add e,e,rT2; /* 1: E = E + F */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) evxor w0,w0,w1; /* W = W xor W[-14] */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) rotrwi rT2,a,27; /* 1: A' = A rotl 5 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) evrlwi w0,w0,1; /* W = W rotl 1 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) add e,e,rT2; /* 1: E = E + A' */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) evaddw rT0,w0,rK; /* WK = W + K */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) rotrwi b,b,2; /* 1: B = B rotl 30 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) LOAD_K##k##1 \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) evmergehi rT1,rT1,rT0; /* WK1/WK2 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) add e,e,rT0; /* 1: E = E + WK */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) xor rT2,a,b; /* 2: F' = B xor C */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) add d,d,rT1; /* 2: E = E + WK */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) xor rT2,rT2,c; /* 2: F = F' xor D */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) rotrwi rT0,e,27; /* 2: A' = A rotl 5 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) add d,d,rT2; /* 2: E = E + F */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) rotrwi a,a,2; /* 2: B = B rotl 30 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) add d,d,rT0 /* 2: E = E + A' */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) #define R_40_59(a, b, c, d, e, w0, w1, w4, w6, w7, k) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) and rT2,b,c; /* 1: F' = B and C */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) evmergelohi rT0,w7,w6; /* W[-3] */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) or rT1,b,c; /* 1: F" = B or C */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) evxor w0,w0,rT0; /* W = W[-16] xor W[-3] */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) and rT1,d,rT1; /* 1: F" = F" and D */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) evxor w0,w0,w4; /* W = W xor W[-8] */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) or rT2,rT2,rT1; /* 1: F = F' or F" */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) evxor w0,w0,w1; /* W = W xor W[-14] */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) add e,e,rT2; /* 1: E = E + F */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) evrlwi w0,w0,1; /* W = W rotl 1 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) rotrwi rT2,a,27; /* 1: A' = A rotl 5 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) evaddw rT0,w0,rK; /* WK = W + K */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) add e,e,rT2; /* 1: E = E + A' */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) LOAD_K##k##1 \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) evmergehi rT1,rT1,rT0; /* WK1/WK2 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) rotrwi b,b,2; /* 1: B = B rotl 30 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) add e,e,rT0; /* 1: E = E + WK */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) and rT2,a,b; /* 2: F' = B and C */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) or rT0,a,b; /* 2: F" = B or C */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) add d,d,rT1; /* 2: E = E + WK */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) and rT0,c,rT0; /* 2: F" = F" and D */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) rotrwi a,a,2; /* 2: B = B rotl 30 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) or rT2,rT2,rT0; /* 2: F = F' or F" */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) rotrwi rT0,e,27; /* 2: A' = A rotl 5 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) add d,d,rT2; /* 2: E = E + F */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) add d,d,rT0 /* 2: E = E + A' */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) #define R_60_79(a, b, c, d, e, w0, w1, w4, w6, w7, k) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) R_20_39(a, b, c, d, e, w0, w1, w4, w6, w7, k)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) _GLOBAL(ppc_spe_sha1_transform)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) INITIALIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) lwz rH0,0(rHP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) lwz rH1,4(rHP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) mtctr r5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) lwz rH2,8(rHP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) lis rKP,PPC_SPE_SHA1_K@h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) lwz rH3,12(rHP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) ori rKP,rKP,PPC_SPE_SHA1_K@l
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) lwz rH4,16(rHP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) ppc_spe_sha1_main:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) R_00_15(rH0, rH1, rH2, rH3, rH4, rW1, rW0, 1, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) R_00_15(rH3, rH4, rH0, rH1, rH2, rW2, rW1, 0, 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) R_00_15(rH1, rH2, rH3, rH4, rH0, rW3, rW2, 0, 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) R_00_15(rH4, rH0, rH1, rH2, rH3, rW4, rW3, 0, 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) R_00_15(rH2, rH3, rH4, rH0, rH1, rW5, rW4, 0, 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) R_00_15(rH0, rH1, rH2, rH3, rH4, rW6, rW5, 0, 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) R_00_15(rH3, rH4, rH0, rH1, rH2, rT3, rW6, 0, 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) R_00_15(rH1, rH2, rH3, rH4, rH0, rT3, rW7, 0, 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) R_16_19(rH4, rH0, rH1, rH2, rH3, rW0, rW1, rW4, rW6, rW7, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) R_16_19(rH2, rH3, rH4, rH0, rH1, rW1, rW2, rW5, rW7, rW0, 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) R_20_39(rH0, rH1, rH2, rH3, rH4, rW2, rW3, rW6, rW0, rW1, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) R_20_39(rH3, rH4, rH0, rH1, rH2, rW3, rW4, rW7, rW1, rW2, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) R_20_39(rH1, rH2, rH3, rH4, rH0, rW4, rW5, rW0, rW2, rW3, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) R_20_39(rH4, rH0, rH1, rH2, rH3, rW5, rW6, rW1, rW3, rW4, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) R_20_39(rH2, rH3, rH4, rH0, rH1, rW6, rW7, rW2, rW4, rW5, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) R_20_39(rH0, rH1, rH2, rH3, rH4, rW7, rW0, rW3, rW5, rW6, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) R_20_39(rH3, rH4, rH0, rH1, rH2, rW0, rW1, rW4, rW6, rW7, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) R_20_39(rH1, rH2, rH3, rH4, rH0, rW1, rW2, rW5, rW7, rW0, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) R_20_39(rH4, rH0, rH1, rH2, rH3, rW2, rW3, rW6, rW0, rW1, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) R_20_39(rH2, rH3, rH4, rH0, rH1, rW3, rW4, rW7, rW1, rW2, 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) R_40_59(rH0, rH1, rH2, rH3, rH4, rW4, rW5, rW0, rW2, rW3, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) R_40_59(rH3, rH4, rH0, rH1, rH2, rW5, rW6, rW1, rW3, rW4, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) R_40_59(rH1, rH2, rH3, rH4, rH0, rW6, rW7, rW2, rW4, rW5, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) R_40_59(rH4, rH0, rH1, rH2, rH3, rW7, rW0, rW3, rW5, rW6, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) R_40_59(rH2, rH3, rH4, rH0, rH1, rW0, rW1, rW4, rW6, rW7, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) R_40_59(rH0, rH1, rH2, rH3, rH4, rW1, rW2, rW5, rW7, rW0, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) R_40_59(rH3, rH4, rH0, rH1, rH2, rW2, rW3, rW6, rW0, rW1, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) R_40_59(rH1, rH2, rH3, rH4, rH0, rW3, rW4, rW7, rW1, rW2, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) R_40_59(rH4, rH0, rH1, rH2, rH3, rW4, rW5, rW0, rW2, rW3, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) R_40_59(rH2, rH3, rH4, rH0, rH1, rW5, rW6, rW1, rW3, rW4, 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) R_60_79(rH0, rH1, rH2, rH3, rH4, rW6, rW7, rW2, rW4, rW5, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) R_60_79(rH3, rH4, rH0, rH1, rH2, rW7, rW0, rW3, rW5, rW6, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) R_60_79(rH1, rH2, rH3, rH4, rH0, rW0, rW1, rW4, rW6, rW7, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) R_60_79(rH4, rH0, rH1, rH2, rH3, rW1, rW2, rW5, rW7, rW0, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) R_60_79(rH2, rH3, rH4, rH0, rH1, rW2, rW3, rW6, rW0, rW1, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) R_60_79(rH0, rH1, rH2, rH3, rH4, rW3, rW4, rW7, rW1, rW2, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) R_60_79(rH3, rH4, rH0, rH1, rH2, rW4, rW5, rW0, rW2, rW3, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) lwz rT3,0(rHP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) R_60_79(rH1, rH2, rH3, rH4, rH0, rW5, rW6, rW1, rW3, rW4, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) lwz rW1,4(rHP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) R_60_79(rH4, rH0, rH1, rH2, rH3, rW6, rW7, rW2, rW4, rW5, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) lwz rW2,8(rHP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) R_60_79(rH2, rH3, rH4, rH0, rH1, rW7, rW0, rW3, rW5, rW6, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) lwz rW3,12(rHP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) NEXT_BLOCK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) lwz rW4,16(rHP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) add rH0,rH0,rT3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) stw rH0,0(rHP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) add rH1,rH1,rW1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) stw rH1,4(rHP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) add rH2,rH2,rW2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) stw rH2,8(rHP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) add rH3,rH3,rW3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) stw rH3,12(rHP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) add rH4,rH4,rW4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) stw rH4,16(rHP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) bdnz ppc_spe_sha1_main
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) FINALIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) blr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) .data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) .align 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) PPC_SPE_SHA1_K:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) .long 0x5A827999,0x6ED9EBA1,0x8F1BBCDC,0xCA62C1D6
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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