^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Fast MD5 implementation for PPC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 2015 Markus Stockhausen <stockhausen@collogia.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <asm/ppc_asm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <asm/asm-offsets.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <asm/asm-compat.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define rHP r3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define rWP r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define rH0 r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define rH1 r6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define rH2 r7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define rH3 r5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define rW00 r8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define rW01 r9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define rW02 r10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define rW03 r11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define rW04 r12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define rW05 r14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define rW06 r15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define rW07 r16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define rW08 r17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define rW09 r18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define rW10 r19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define rW11 r20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define rW12 r21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define rW13 r22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define rW14 r23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define rW15 r24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define rT0 r25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define rT1 r26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define INITIALIZE \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) PPC_STLU r1,-INT_FRAME_SIZE(r1); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) SAVE_8GPRS(14, r1); /* push registers onto stack */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) SAVE_4GPRS(22, r1); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) SAVE_GPR(26, r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define FINALIZE \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) REST_8GPRS(14, r1); /* pop registers from stack */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) REST_4GPRS(22, r1); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) REST_GPR(26, r1); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) addi r1,r1,INT_FRAME_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #ifdef __BIG_ENDIAN__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define LOAD_DATA(reg, off) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) lwbrx reg,0,rWP; /* load data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define INC_PTR \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) addi rWP,rWP,4; /* increment per word */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define NEXT_BLOCK /* nothing to do */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define LOAD_DATA(reg, off) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) lwz reg,off(rWP); /* load data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define INC_PTR /* nothing to do */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define NEXT_BLOCK \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) addi rWP,rWP,64; /* increment per block */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define R_00_15(a, b, c, d, w0, w1, p, q, off, k0h, k0l, k1h, k1l) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) LOAD_DATA(w0, off) /* W */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) and rT0,b,c; /* 1: f = b and c */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) INC_PTR /* ptr++ */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) andc rT1,d,b; /* 1: f' = ~b and d */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) LOAD_DATA(w1, off+4) /* W */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) or rT0,rT0,rT1; /* 1: f = f or f' */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) addi w0,w0,k0l; /* 1: wk = w + k */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) add a,a,rT0; /* 1: a = a + f */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) addis w0,w0,k0h; /* 1: wk = w + k' */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) addis w1,w1,k1h; /* 2: wk = w + k */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) add a,a,w0; /* 1: a = a + wk */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) addi w1,w1,k1l; /* 2: wk = w + k' */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) rotrwi a,a,p; /* 1: a = a rotl x */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) add d,d,w1; /* 2: a = a + wk */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) add a,a,b; /* 1: a = a + b */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) and rT0,a,b; /* 2: f = b and c */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) andc rT1,c,a; /* 2: f' = ~b and d */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) or rT0,rT0,rT1; /* 2: f = f or f' */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) add d,d,rT0; /* 2: a = a + f */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) INC_PTR /* ptr++ */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) rotrwi d,d,q; /* 2: a = a rotl x */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) add d,d,a; /* 2: a = a + b */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define R_16_31(a, b, c, d, w0, w1, p, q, k0h, k0l, k1h, k1l) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) andc rT0,c,d; /* 1: f = c and ~d */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) and rT1,b,d; /* 1: f' = b and d */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) addi w0,w0,k0l; /* 1: wk = w + k */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) or rT0,rT0,rT1; /* 1: f = f or f' */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) addis w0,w0,k0h; /* 1: wk = w + k' */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) add a,a,rT0; /* 1: a = a + f */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) addi w1,w1,k1l; /* 2: wk = w + k */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) add a,a,w0; /* 1: a = a + wk */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) addis w1,w1,k1h; /* 2: wk = w + k' */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) andc rT0,b,c; /* 2: f = c and ~d */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) rotrwi a,a,p; /* 1: a = a rotl x */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) add a,a,b; /* 1: a = a + b */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) add d,d,w1; /* 2: a = a + wk */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) and rT1,a,c; /* 2: f' = b and d */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) or rT0,rT0,rT1; /* 2: f = f or f' */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) add d,d,rT0; /* 2: a = a + f */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) rotrwi d,d,q; /* 2: a = a rotl x */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) add d,d,a; /* 2: a = a +b */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #define R_32_47(a, b, c, d, w0, w1, p, q, k0h, k0l, k1h, k1l) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) xor rT0,b,c; /* 1: f' = b xor c */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) addi w0,w0,k0l; /* 1: wk = w + k */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) xor rT1,rT0,d; /* 1: f = f xor f' */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) addis w0,w0,k0h; /* 1: wk = w + k' */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) add a,a,rT1; /* 1: a = a + f */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) addi w1,w1,k1l; /* 2: wk = w + k */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) add a,a,w0; /* 1: a = a + wk */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) addis w1,w1,k1h; /* 2: wk = w + k' */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) rotrwi a,a,p; /* 1: a = a rotl x */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) add d,d,w1; /* 2: a = a + wk */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) add a,a,b; /* 1: a = a + b */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) xor rT1,rT0,a; /* 2: f = b xor f' */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) add d,d,rT1; /* 2: a = a + f */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) rotrwi d,d,q; /* 2: a = a rotl x */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) add d,d,a; /* 2: a = a + b */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #define R_48_63(a, b, c, d, w0, w1, p, q, k0h, k0l, k1h, k1l) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) addi w0,w0,k0l; /* 1: w = w + k */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) orc rT0,b,d; /* 1: f = b or ~d */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) addis w0,w0,k0h; /* 1: w = w + k' */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) xor rT0,rT0,c; /* 1: f = f xor c */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) add a,a,w0; /* 1: a = a + wk */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) addi w1,w1,k1l; /* 2: w = w + k */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) add a,a,rT0; /* 1: a = a + f */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) addis w1,w1,k1h; /* 2: w = w + k' */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) rotrwi a,a,p; /* 1: a = a rotl x */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) add a,a,b; /* 1: a = a + b */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) orc rT0,a,c; /* 2: f = b or ~d */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) add d,d,w1; /* 2: a = a + wk */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) xor rT0,rT0,b; /* 2: f = f xor c */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) add d,d,rT0; /* 2: a = a + f */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) rotrwi d,d,q; /* 2: a = a rotl x */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) add d,d,a; /* 2: a = a + b */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) _GLOBAL(ppc_md5_transform)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) INITIALIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) mtctr r5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) lwz rH0,0(rHP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) lwz rH1,4(rHP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) lwz rH2,8(rHP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) lwz rH3,12(rHP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) ppc_md5_main:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) R_00_15(rH0, rH1, rH2, rH3, rW00, rW01, 25, 20, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 0xd76b, -23432, 0xe8c8, -18602)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) R_00_15(rH2, rH3, rH0, rH1, rW02, rW03, 15, 10, 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 0x2420, 0x70db, 0xc1be, -12562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) R_00_15(rH0, rH1, rH2, rH3, rW04, rW05, 25, 20, 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 0xf57c, 0x0faf, 0x4788, -14806)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) R_00_15(rH2, rH3, rH0, rH1, rW06, rW07, 15, 10, 24,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 0xa830, 0x4613, 0xfd47, -27391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) R_00_15(rH0, rH1, rH2, rH3, rW08, rW09, 25, 20, 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 0x6981, -26408, 0x8b45, -2129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) R_00_15(rH2, rH3, rH0, rH1, rW10, rW11, 15, 10, 40,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 0xffff, 0x5bb1, 0x895d, -10306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) R_00_15(rH0, rH1, rH2, rH3, rW12, rW13, 25, 20, 48,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 0x6b90, 0x1122, 0xfd98, 0x7193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) R_00_15(rH2, rH3, rH0, rH1, rW14, rW15, 15, 10, 56,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 0xa679, 0x438e, 0x49b4, 0x0821)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) R_16_31(rH0, rH1, rH2, rH3, rW01, rW06, 27, 23,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 0x0d56, 0x6e0c, 0x1810, 0x6d2d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) R_16_31(rH2, rH3, rH0, rH1, rW11, rW00, 18, 12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 0x9d02, -32109, 0x124c, 0x2332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) R_16_31(rH0, rH1, rH2, rH3, rW05, rW10, 27, 23,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 0x8ea7, 0x4a33, 0x0245, -18270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) R_16_31(rH2, rH3, rH0, rH1, rW15, rW04, 18, 12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 0x8eee, -8608, 0xf258, -5095)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) R_16_31(rH0, rH1, rH2, rH3, rW09, rW14, 27, 23,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 0x969d, -10697, 0x1cbe, -15288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) R_16_31(rH2, rH3, rH0, rH1, rW03, rW08, 18, 12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 0x3317, 0x3e99, 0xdbd9, 0x7c15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) R_16_31(rH0, rH1, rH2, rH3, rW13, rW02, 27, 23,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 0xac4b, 0x7772, 0xd8cf, 0x331d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) R_16_31(rH2, rH3, rH0, rH1, rW07, rW12, 18, 12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 0x6a28, 0x6dd8, 0x219a, 0x3b68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) R_32_47(rH0, rH1, rH2, rH3, rW05, rW08, 28, 21,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 0x29cb, 0x28e5, 0x4218, -7788)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) R_32_47(rH2, rH3, rH0, rH1, rW11, rW14, 16, 9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 0x473f, 0x06d1, 0x3aae, 0x3036)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) R_32_47(rH0, rH1, rH2, rH3, rW01, rW04, 28, 21,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 0xaea1, -15134, 0x640b, -11295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) R_32_47(rH2, rH3, rH0, rH1, rW07, rW10, 16, 9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 0x8f4c, 0x4887, 0xbc7c, -22499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) R_32_47(rH0, rH1, rH2, rH3, rW13, rW00, 28, 21,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 0x7eb8, -27199, 0x00ea, 0x6050)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) R_32_47(rH2, rH3, rH0, rH1, rW03, rW06, 16, 9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 0xe01a, 0x22fe, 0x4447, 0x69c5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) R_32_47(rH0, rH1, rH2, rH3, rW09, rW12, 28, 21,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 0xb7f3, 0x0253, 0x59b1, 0x4d5b)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) R_32_47(rH2, rH3, rH0, rH1, rW15, rW02, 16, 9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 0x4701, -27017, 0xc7bd, -19859)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) R_48_63(rH0, rH1, rH2, rH3, rW00, rW07, 26, 22,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 0x0988, -1462, 0x4c70, -19401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) R_48_63(rH2, rH3, rH0, rH1, rW14, rW05, 17, 11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 0xadaf, -5221, 0xfc99, 0x66f7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) R_48_63(rH0, rH1, rH2, rH3, rW12, rW03, 26, 22,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 0x7e80, -16418, 0xba1e, -25587)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) R_48_63(rH2, rH3, rH0, rH1, rW10, rW01, 17, 11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 0x4130, 0x380d, 0xe0c5, 0x738d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) lwz rW00,0(rHP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) R_48_63(rH0, rH1, rH2, rH3, rW08, rW15, 26, 22,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 0xe837, -30770, 0xde8a, 0x69e8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) lwz rW14,4(rHP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) R_48_63(rH2, rH3, rH0, rH1, rW06, rW13, 17, 11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 0x9e79, 0x260f, 0x256d, -27941)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) lwz rW12,8(rHP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) R_48_63(rH0, rH1, rH2, rH3, rW04, rW11, 26, 22,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 0xab75, -20775, 0x4f9e, -28397)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) lwz rW10,12(rHP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) R_48_63(rH2, rH3, rH0, rH1, rW02, rW09, 17, 11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 0x662b, 0x7c56, 0x11b2, 0x0358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) add rH0,rH0,rW00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) stw rH0,0(rHP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) add rH1,rH1,rW14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) stw rH1,4(rHP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) add rH2,rH2,rW12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) stw rH2,8(rHP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) add rH3,rH3,rW10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) stw rH3,12(rHP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) NEXT_BLOCK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) bdnz ppc_md5_main
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) FINALIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) blr
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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