Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Calculate a CRC T10-DIF with vpmsum acceleration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright 2017, Daniel Axtens, IBM Corporation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * [based on crc32c-vpmsum_glue.c]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/crc-t10dif.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <crypto/internal/hash.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <crypto/internal/simd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/string.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/cpufeature.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <asm/simd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <asm/switch_to.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #define VMX_ALIGN		16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #define VMX_ALIGN_MASK		(VMX_ALIGN-1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #define VECTOR_BREAKPOINT	64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) u32 __crct10dif_vpmsum(u32 crc, unsigned char const *p, size_t len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) static u16 crct10dif_vpmsum(u16 crci, unsigned char const *p, size_t len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 	unsigned int prealign;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	unsigned int tail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	u32 crc = crci;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	if (len < (VECTOR_BREAKPOINT + VMX_ALIGN) || !crypto_simd_usable())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 		return crc_t10dif_generic(crc, p, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	if ((unsigned long)p & VMX_ALIGN_MASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 		prealign = VMX_ALIGN - ((unsigned long)p & VMX_ALIGN_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 		crc = crc_t10dif_generic(crc, p, prealign);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 		len -= prealign;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 		p += prealign;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	if (len & ~VMX_ALIGN_MASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 		crc <<= 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 		preempt_disable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 		pagefault_disable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 		enable_kernel_altivec();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 		crc = __crct10dif_vpmsum(crc, p, len & ~VMX_ALIGN_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 		disable_kernel_altivec();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 		pagefault_enable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 		preempt_enable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 		crc >>= 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	tail = len & VMX_ALIGN_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	if (tail) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 		p += len & ~VMX_ALIGN_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 		crc = crc_t10dif_generic(crc, p, tail);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	return crc & 0xffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) static int crct10dif_vpmsum_init(struct shash_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	u16 *crc = shash_desc_ctx(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	*crc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) static int crct10dif_vpmsum_update(struct shash_desc *desc, const u8 *data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 			    unsigned int length)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	u16 *crc = shash_desc_ctx(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	*crc = crct10dif_vpmsum(*crc, data, length);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) static int crct10dif_vpmsum_final(struct shash_desc *desc, u8 *out)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	u16 *crcp = shash_desc_ctx(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	*(u16 *)out = *crcp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) static struct shash_alg alg = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	.init		= crct10dif_vpmsum_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	.update		= crct10dif_vpmsum_update,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	.final		= crct10dif_vpmsum_final,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	.descsize	= CRC_T10DIF_DIGEST_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	.digestsize	= CRC_T10DIF_DIGEST_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	.base		= {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 		.cra_name		= "crct10dif",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 		.cra_driver_name	= "crct10dif-vpmsum",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 		.cra_priority		= 200,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 		.cra_blocksize		= CRC_T10DIF_BLOCK_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 		.cra_module		= THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) static int __init crct10dif_vpmsum_mod_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	if (!cpu_has_feature(CPU_FTR_ARCH_207S))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	return crypto_register_shash(&alg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) static void __exit crct10dif_vpmsum_mod_fini(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	crypto_unregister_shash(&alg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) module_cpu_feature_match(PPC_MODULE_FEATURE_VEC_CRYPTO, crct10dif_vpmsum_mod_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) module_exit(crct10dif_vpmsum_mod_fini);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) MODULE_AUTHOR("Daniel Axtens <dja@axtens.net>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) MODULE_DESCRIPTION("CRCT10DIF using vector polynomial multiply-sum instructions");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) MODULE_ALIAS_CRYPTO("crct10dif");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) MODULE_ALIAS_CRYPTO("crct10dif-vpmsum");