^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copied from <file:arch/powerpc/kernel/misc_32.S>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * This file contains miscellaneous low-level functions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Largely rewritten by Cort Dougan (cort@cs.nmt.edu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * and Paul Mackerras.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * kexec bits:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * Copyright (C) 2002-2003 Eric Biederman <ebiederm@xmission.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * GameCube/ppc32 port Copyright (C) 2004 Albert Herranz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include "ppc_asm.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define SPRN_PVR 0x11F /* Processor Version Register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) .text
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) /* udelay needs to know the period of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * timebase in nanoseconds. This used to be hardcoded to be 60ns
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * (period of 66MHz/4). Now a variable is used that is initialized to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * 60 for backward compatibility, but it can be overridden as necessary
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * with code something like this:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * extern unsigned long timebase_period_ns;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * timebase_period_ns = 1000000000 / bd->bi_tbfreq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) .data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) .globl timebase_period_ns
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) timebase_period_ns:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) .long 60
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) .text
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * Delay for a number of microseconds
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) .globl udelay
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) udelay:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) mulli r4,r3,1000 /* nanoseconds */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) /* Change r4 to be the number of ticks using:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) * (nanoseconds + (timebase_period_ns - 1 )) / timebase_period_ns
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) * timebase_period_ns defaults to 60 (16.6MHz) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) mflr r5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) bl 0f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 0: mflr r6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) mtlr r5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) lis r5,0b@ha
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) addi r5,r5,0b@l
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) subf r5,r5,r6 /* In case we're relocated */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) addis r5,r5,timebase_period_ns@ha
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) lwz r5,timebase_period_ns@l(r5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) add r4,r4,r5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) addi r4,r4,-1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) divw r4,r4,r5 /* BUS ticks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 1: MFTBU(r5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) MFTBL(r6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) MFTBU(r7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) cmpw 0,r5,r7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) bne 1b /* Get [synced] base time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) addc r9,r6,r4 /* Compute end time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) addze r8,r5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 2: MFTBU(r5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) cmpw 0,r5,r8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) blt 2b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) bgt 3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) MFTBL(r6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) cmpw 0,r6,r9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) blt 2b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) 3: blr