Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * arch/powerpc/boot/ugecon.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * USB Gecko bootwrapper console.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * Copyright (C) 2008-2009 The GameCube Linux Team
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Copyright (C) 2008,2009 Albert Herranz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <stddef.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include "stdio.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include "types.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include "io.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include "ops.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #define EXI_CLK_32MHZ           5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #define EXI_CSR                 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #define   EXI_CSR_CLKMASK       (0x7<<4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #define     EXI_CSR_CLK_32MHZ   (EXI_CLK_32MHZ<<4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #define   EXI_CSR_CSMASK        (0x7<<7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #define     EXI_CSR_CS_0        (0x1<<7)  /* Chip Select 001 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define EXI_CR                  0x0c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define   EXI_CR_TSTART         (1<<0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define   EXI_CR_WRITE		(1<<2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define   EXI_CR_READ_WRITE     (2<<2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define   EXI_CR_TLEN(len)      (((len)-1)<<4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define EXI_DATA                0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) /* virtual address base for input/output, retrieved from device tree */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) static void *ug_io_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) static u32 ug_io_transaction(u32 in)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	u32 *csr_reg = ug_io_base + EXI_CSR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	u32 *data_reg = ug_io_base + EXI_DATA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	u32 *cr_reg = ug_io_base + EXI_CR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	u32 csr, data, cr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	/* select */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	csr = EXI_CSR_CLK_32MHZ | EXI_CSR_CS_0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	out_be32(csr_reg, csr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	/* read/write */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	data = in;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	out_be32(data_reg, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	cr = EXI_CR_TLEN(2) | EXI_CR_READ_WRITE | EXI_CR_TSTART;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	out_be32(cr_reg, cr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	while (in_be32(cr_reg) & EXI_CR_TSTART)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 		barrier();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	/* deselect */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	out_be32(csr_reg, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	data = in_be32(data_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	return data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) static int ug_is_txfifo_ready(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	return ug_io_transaction(0xc0000000) & 0x04000000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) static void ug_raw_putc(char ch)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	ug_io_transaction(0xb0000000 | (ch << 20));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) static void ug_putc(char ch)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	int count = 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	if (!ug_io_base)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	while (!ug_is_txfifo_ready() && count--)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 		barrier();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	if (count >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 		ug_raw_putc(ch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) void ug_console_write(const char *buf, int len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	char *b = (char *)buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	while (len--) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 		if (*b == '\n')
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 			ug_putc('\r');
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 		ug_putc(*b++);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) static int ug_is_adapter_present(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	if (!ug_io_base)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	return ug_io_transaction(0x90000000) == 0x04700000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) static void *ug_grab_exi_io_base(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	u32 v;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	void *devp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	devp = find_node_by_compatible(NULL, "nintendo,flipper-exi");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	if (devp == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 		goto err_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	if (getprop(devp, "virtual-reg", &v, sizeof(v)) != sizeof(v))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 		goto err_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	return (void *)v;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) err_out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) void *ug_probe(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	void *exi_io_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	exi_io_base = ug_grab_exi_io_base();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	if (!exi_io_base)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 		return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	/* look for a usbgecko on memcard slots A and B */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	for (i = 0; i < 2; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 		ug_io_base = exi_io_base + 0x14 * i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 		if (ug_is_adapter_present())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	if (i == 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 		ug_io_base = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	return ug_io_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)