Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Old U-boot compatibility for Taishan
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Author: Hugh Blemings <hugh@au.ibm.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  * Copyright 2007 Hugh Blemings, IBM Corporation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  *   Based on cuboot-ebony.c which is:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  * Copyright 2007 David Gibson, IBM Corporation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)  *   Based on cuboot-83xx.c, which is:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)  * Copyright (c) 2007 Freescale Semiconductor, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include "ops.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include "stdio.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include "cuboot.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include "reg.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include "dcr.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include "4xx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define TARGET_4xx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define TARGET_44x
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define TARGET_440GX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include "ppcboot.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) static bd_t bd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) BSS_STACK(4096);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) static void taishan_fixups(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	/* FIXME: sysclk should be derived by reading the FPGA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	   registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	unsigned long sysclk = 33000000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	ibm440gx_fixup_clocks(sysclk, 6 * 1843200, 25000000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	ibm4xx_sdram_fixup_memsize();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	dt_fixup_mac_address_by_alias("ethernet1", bd.bi_enet1addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	ibm4xx_fixup_ebc_ranges("/plb/opb/ebc");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 		   unsigned long r6, unsigned long r7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 	CUBOOT_INIT();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 	platform_ops.fixups = taishan_fixups;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 	fdt_init(_dtb_start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 	serial_console_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) }