^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Old U-boot compatibility for MPC5200
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Author: Grant Likely <grant.likely@secretlab.ca>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (c) 2007 Secret Lab Technologies Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Copyright (c) 2007 Freescale Semiconductor, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include "ops.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include "stdio.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include "io.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include "cuboot.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define TARGET_PPC_MPC52xx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include "ppcboot.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) static bd_t bd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) static void platform_fixups(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) void *soc, *reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) int div;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) u32 sysfreq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) dt_fixup_memory(bd.bi_memstart, bd.bi_memsize);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) dt_fixup_mac_addresses(bd.bi_enetaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 4, bd.bi_busfreq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) /* Unfortunately, the specific model number is encoded in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * soc node name in existing dts files -- once that is fixed,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * this can do a simple path lookup.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) soc = find_node_by_devtype(NULL, "soc");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) if (!soc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) soc = find_node_by_compatible(NULL, "fsl,mpc5200-immr");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) if (!soc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) soc = find_node_by_compatible(NULL, "fsl,mpc5200b-immr");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) if (soc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) setprop(soc, "bus-frequency", &bd.bi_ipbfreq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) sizeof(bd.bi_ipbfreq));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) if (!dt_xlate_reg(soc, 0, (void*)®, NULL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) div = in_8(reg + 0x204) & 0x0020 ? 8 : 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) sysfreq = bd.bi_busfreq * div;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) setprop(soc, "system-frequency", &sysfreq, sizeof(sysfreq));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) unsigned long r6, unsigned long r7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) CUBOOT_INIT();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) fdt_init(_dtb_start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) serial_console_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) platform_ops.fixups = platform_fixups;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) }