^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) #ifndef _PARISC_PSW_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #define _PARISC_PSW_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) #define PSW_I 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #define PSW_D 0x00000002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #define PSW_P 0x00000004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #define PSW_Q 0x00000008
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define PSW_R 0x00000010
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define PSW_F 0x00000020
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define PSW_G 0x00000040 /* PA1.x only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define PSW_O 0x00000080 /* PA2.0 only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) /* ssm/rsm instructions number PSW_W and PSW_E differently */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define PSW_SM_I PSW_I /* Enable External Interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define PSW_SM_D PSW_D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define PSW_SM_P PSW_P
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define PSW_SM_Q PSW_Q /* Enable Interrupt State Collection */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define PSW_SM_R PSW_R /* Enable Recover Counter Trap */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define PSW_SM_W 0x200 /* PA2.0 only : Enable Wide Mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define PSW_SM_QUIET PSW_SM_R+PSW_SM_Q+PSW_SM_P+PSW_SM_D+PSW_SM_I
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define PSW_CB 0x0000ff00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define PSW_M 0x00010000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define PSW_V 0x00020000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define PSW_C 0x00040000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define PSW_B 0x00080000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define PSW_X 0x00100000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define PSW_N 0x00200000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define PSW_L 0x00400000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define PSW_H 0x00800000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define PSW_T 0x01000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define PSW_S 0x02000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define PSW_E 0x04000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define PSW_W 0x08000000 /* PA2.0 only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define PSW_W_BIT 36 /* PA2.0 only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define PSW_Z 0x40000000 /* PA1.x only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define PSW_Y 0x80000000 /* PA1.x only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #ifdef CONFIG_64BIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) # define PSW_HI_CB 0x000000ff /* PA2.0 only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #ifdef CONFIG_64BIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) # define USER_PSW_HI_MASK PSW_HI_CB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) # define WIDE_PSW PSW_W
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) # define WIDE_PSW 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) /* Used when setting up for rfi */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define KERNEL_PSW (WIDE_PSW | PSW_C | PSW_Q | PSW_P | PSW_D)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define REAL_MODE_PSW (WIDE_PSW | PSW_Q)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define USER_PSW_MASK (WIDE_PSW | PSW_T | PSW_N | PSW_X | PSW_B | PSW_V | PSW_CB)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define USER_PSW (PSW_C | PSW_Q | PSW_P | PSW_D | PSW_I)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #ifndef __ASSEMBLY__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) /* The program status word as bitfields. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) struct pa_psw {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) unsigned int y:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) unsigned int z:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) unsigned int rv:2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) unsigned int w:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) unsigned int e:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) unsigned int s:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) unsigned int t:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) unsigned int h:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) unsigned int l:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) unsigned int n:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) unsigned int x:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) unsigned int b:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) unsigned int c:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) unsigned int v:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) unsigned int m:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) unsigned int cb:8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) unsigned int o:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) unsigned int g:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) unsigned int f:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) unsigned int r:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) unsigned int q:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) unsigned int p:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) unsigned int d:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) unsigned int i:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #ifdef CONFIG_64BIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define pa_psw(task) ((struct pa_psw *) ((char *) (task) + TASK_PT_PSW + 4))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define pa_psw(task) ((struct pa_psw *) ((char *) (task) + TASK_PT_PSW))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #endif /* !__ASSEMBLY__ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #endif