Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * include/asm-parisc/irq.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Copyright 2005 Matthew Wilcox <matthew@wil.cx>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #ifndef _ASM_PARISC_IRQ_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #define _ASM_PARISC_IRQ_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/cpumask.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <asm/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define NO_IRQ		(-1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #ifdef CONFIG_GSC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define GSC_IRQ_BASE	16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define GSC_IRQ_MAX	63
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define CPU_IRQ_BASE	64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define CPU_IRQ_BASE	16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define TIMER_IRQ	(CPU_IRQ_BASE + 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define	IPI_IRQ		(CPU_IRQ_BASE + 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define CPU_IRQ_MAX	(CPU_IRQ_BASE + (BITS_PER_LONG - 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define NR_IRQS		(CPU_IRQ_MAX + 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) static __inline__ int irq_canonicalize(int irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	return (irq == 2) ? 9 : irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) struct irq_chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) struct irq_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) void cpu_ack_irq(struct irq_data *d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) void cpu_eoi_irq(struct irq_data *d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) extern int txn_alloc_irq(unsigned int nbits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) extern int txn_claim_irq(int);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) extern unsigned int txn_alloc_data(unsigned int);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) extern unsigned long txn_alloc_addr(unsigned int);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) extern unsigned long txn_affinity_addr(unsigned int irq, int cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) extern int cpu_claim_irq(unsigned int irq, struct irq_chip *, void *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) extern int cpu_check_affinity(struct irq_data *d, const struct cpumask *dest);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) /* soft power switch support (power.c) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) extern struct tasklet_struct power_tasklet;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #endif	/* _ASM_PARISC_IRQ_H */